Displaying 2 results from an estimated 2 matches for "extloadi64i32".
2017 Aug 02
2
Efficiently ignoring upper 32 pointer bits whendereferencing
...means you'll need
to write your own separate pattern for every load/store instruction, but
there isn't really any way around that.
There are some existing patterns involving MOV32rm, if you want
inspiration; for example, the following pattern is from X86InstrCompiler.td:
def : Pat<(extloadi64i32 addr:$src),
(SUBREG_TO_REG (i64 0), (MOV32rm addr:$src), sub_32bit)>;
-Eli
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
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2017 Aug 02
2
Efficiently ignoring upper 32 pointer bits when dereferencing
Hi all,
I am experiencing a problem with the representation of addresses in the
x86_64 TableGen backend and was hoping someone can tell me if it is
fixable. Any comments or hints in to send me in the right direction
would be greatly appreciated. I am using LLVM version 3.8, commit
251286.
I have an IR pass that stores metadata in the upper 32 bits of 64-bit
pointers in order to implement