search for: extended_carry1

...t; The register class could be "not allocatable” (see CCR in AArch64 for > instance). > Note, that if that class is unallocable, you’ll have to manage > manually any overlapping that could arise. > E.g., > s32 ..., s1 carry1 = G_UADDO > s32 ..., s1 carry2 = G_UADDO > s32 extended_carry1 = zext s1 carry1 <— carry1 will be destroyed by > the second G_UADDO, you’ll have to fix the schedule or copy the value > manually. > s32 extended_carry2 = zext s1 carry2 > icmp s32 extended_carry1, extended_carry2 So before instruction selection we would need to check if there are...

Hi Quentin, thank you for the reply! This clears up a lot of the questions I was having. It seems like we should definitely invest some time in rewriting some of our legalization rules then! I also posted some questions further down below. I would appreciate getting your opinion on them. > Hi Dominik, > > I’ll do a brief reply here and if you want more information we can talk further