Displaying 7 results from an estimated 7 matches for "expilicitly".
2013 Jun 21
3
[LLVMdev] Register Class assignment for integer and pointer types
llvm code generator lowers both integer and pointer types into ixx(say,
i16, i32, i64, ...). This make senses for some optimizations.
However, integer registers and pointer registers is expilicitly
distinguished from each other for some architectures, like TriCore,
Blackfin, and our lab prototype dsp, which accelerates address computation
and memory access.
I have already read this mail thread:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-May/022142.html , and I am
wondering how is the pr...
2013 Jun 21
0
[LLVMdev] Register Class assignment for integer and pointer types
...e to keep working.
David
On 21 Jun 2013, at 06:00, 杨勇勇 <triple.yang at gmail.com> wrote:
> llvm code generator lowers both integer and pointer types into ixx(say, i16, i32, i64, ...). This make senses for some optimizations.
>
> However, integer registers and pointer registers is expilicitly distinguished from each other for some architectures, like TriCore, Blackfin, and our lab prototype dsp, which accelerates address computation and memory access.
>
> I have already read this mail thread: http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-May/022142.html , and I am wondering how...
2013 Jun 23
3
[LLVMdev] Register Class assignment for integer and pointer types
...gt; On 21 Jun 2013, at 06:00, 杨勇勇 <triple.yang at gmail.com> wrote:
>
> > llvm code generator lowers both integer and pointer types into ixx(say,
> i16, i32, i64, ...). This make senses for some optimizations.
> >
> > However, integer registers and pointer registers is expilicitly
> distinguished from each other for some architectures, like TriCore,
> Blackfin, and our lab prototype dsp, which accelerates address computation
> and memory access.
> >
> > I have already read this mail thread:
> http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-May/022142....
2013 Jun 23
0
[LLVMdev] Register Class assignment for integer and pointer types
...;
> On 21 Jun 2013, at 06:00, 杨勇勇 <triple.yang at gmail.com> wrote:
>
> > llvm code generator lowers both integer and pointer types into ixx(say, i16, i32, i64, ...). This make senses for some optimizations.
> >
> > However, integer registers and pointer registers is expilicitly distinguished from each other for some architectures, like TriCore, Blackfin, and our lab prototype dsp, which accelerates address computation and memory access.
> >
> > I have already read this mail thread: http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-May/022142.html , and I am wond...
2013 Jun 24
2
[LLVMdev] Register Class assignment for integer and pointer types
...13, at 06:00, 杨勇勇 <triple.yang at gmail.com> wrote:
> >
> > > llvm code generator lowers both integer and pointer types into ixx(say, i16, i32, i64, ...). This make senses for some optimizations.
> > >
> > > However, integer registers and pointer registers is expilicitly distinguished from each other for some architectures, like TriCore, Blackfin, and our lab prototype dsp, which accelerates address computation and memory access.
> > >
> > > I have already read this mail thread: http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-May/022142.html , and...
2013 Jul 09
0
Slight memory leak or bad documentation
...ruct(::FLAC__metadata_simple_iterator_get_block(iterator_));"), if one does not delete this pointer, the program leaks memory (see attached example, run it through valgrind).
However the documentation for get_block() only refers to the C API function FLAC__metadata_iterator_get_block(), which expilicitly states: "Do not call FLAC__metadata_object_delete() on the returned object".
I don't see an easy way to change get_block() to return a pointer which wouldn't require deleting (as the underlying C function doesn't return a pointer to a C++ object), so I think the documentation...
2013 Jun 24
1
[LLVMdev] Register Class assignment for integer and pointer types
...at 06:00, 杨勇勇 <triple.yang at gmail.com> wrote:
> >
> > > llvm code generator lowers both integer and pointer types into
> ixx(say, i16, i32, i64, ...). This make senses for some optimizations.
> > >
> > > However, integer registers and pointer registers is expilicitly
> distinguished from each other for some architectures, like TriCore,
> Blackfin, and our lab prototype dsp, which accelerates address computation
> and memory access.
> > >
> > > I have already read this mail thread:
> http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-M...