search for: expectedcost

...gt; 1, expected cost of VF=2 is computed twice at the moment. bool ForceVectorization = Hints->getForce() == LoopVectorizeHints::FK_Enabled; // Ignore scalar width, because the user explicitly wants vectorization. if (ForceVectorization && MaxVF > 1) { Width = 2; Cost = expectedCost(Width).first / (float)Width; } for (unsigned i = 2; i <= MaxVF; i *= 2) { // Notice that the vector loop needs to be executed less times, so // we need to divide the cost of the vector loops by the width of // the vector elements. VectorizationCostTy C = expectedCost(i);...

...at don't implement the cost interface. If this > is a problem for you then I can do it soon. > > I guess I can just implement all the vectorTargetTransformInfo::get*OpCost functions since I will later need a cost model for mips-dsp anyway. Would the code in LoopVectorizationCostModel::expectedCost work correctly if those functions returned a large integer (max unsigned int)? I am concerned about overflow. > I am asking this because I would like to have loop vectorization disabled > for targets that don't support SIMD instructions (for example, standard > mips32). > > Loo...

Hi Akira! > > Does the current loop vectorizer inquire about the SIMD capabilities of the target architecture when it decides whether it is profitable to vectorize a loop? Yes, it uses a cost model to determine the profitability of vectorization. At the moment only x86 provides the necessary hooks that are needed for calculating the costs. We may need to change the cost defaults to

Nadav (or anyone who is familiar with the loop vectorizer), Does the current loop vectorizer inquire about the SIMD capabilities of the target architecture when it decides whether it is profitable to vectorize a loop? I am asking this because I would like to have loop vectorization disabled for targets that don't support SIMD instructions (for example, standard mips32). Loop vectorization