Displaying 9 results from an estimated 9 matches for "expandunalignedload".
2013 Jul 21
2
[LLVMdev] Disable vectorization for unaligned data
Ok any quick workaround to limit vectorization to 16-byte aligned 128-bit
data then?
All the memory copying done by ExpandUnalignedStore/ExpandUnalignedLoad is
just too expensive.
On Sat, Jul 20, 2013 at 12:52 PM, Arnold Schwaighofer <
aschwaighofer at apple.com> wrote:
>
> On Jul 19, 2013, at 3:14 PM, Francois Pichet <pichet2000 at gmail.com> wrote:
>
> >
> > What is the proper solution to disable auto-vectorization...
2013 Jul 21
0
[LLVMdev] Disable vectorization for unaligned data
...as ARM also has pretty inefficient unaligned vector loads.
On Jul 21, 2013, at 9:29 AM, Francois Pichet <pichet2000 at gmail.com> wrote:
> Ok any quick workaround to limit vectorization to 16-byte aligned 128-bit data then?
>
> All the memory copying done by ExpandUnalignedStore/ExpandUnalignedLoad is just too expensive.
>
>
> On Sat, Jul 20, 2013 at 12:52 PM, Arnold Schwaighofer <aschwaighofer at apple.com> wrote:
>
> On Jul 19, 2013, at 3:14 PM, Francois Pichet <pichet2000 at gmail.com> wrote:
>
> >
> > What is the proper solution to disable aut...
2013 Jul 20
0
[LLVMdev] Disable vectorization for unaligned data
On Jul 19, 2013, at 3:14 PM, Francois Pichet <pichet2000 at gmail.com> wrote:
>
> What is the proper solution to disable auto-vectorization for unaligned data?
>
> I have an out of tree target and I added this:
>
> bool OpusTargetLowering::allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const {
> if (VT.isVector())
> return false;
> ....
> }
>
2009 Feb 18
2
[LLVMdev] Possible error in LegalizeDAG
...// expand it.
if (!TLI.allowsUnalignedMemoryAccesses()) {
unsigned ABIAlignment = TLI.getTargetData()->
getABITypeAlignment(LD->getMemoryVT().getTypeForMVT());
if (LD->getAlignment() < ABIAlignment){
Result =
ExpandUnalignedLoad(cast<LoadSDNode>(Result.getNode()), DAG,
TLI);
Tmp1 = Result.getOperand(0);
Tmp2 = Result.getOperand(1);
Tmp1 = LegalizeOp(Tmp1);
Tmp2 = LegalizeOp(Tmp2);
}...
2013 Jul 19
4
[LLVMdev] Disable vectorization for unaligned data
What is the proper solution to disable auto-vectorization for unaligned
data?
I have an out of tree target and I added this:
bool OpusTargetLowering::allowsUnalignedMemoryAccesses(EVT VT, bool *Fast)
const {
if (VT.isVector())
return false;
....
}
After that, I could see that vectorization is still done on unaligned data
except that llvm will copy the data back and forth from the source
2019 May 14
2
How to change CLang struct alignment behaviour?
Hi John,
On Tue, 14 May 2019 at 17:51, Joan Lluch <joan.lluch at icloud.com> wrote:
> This problem is also shared by the MSP430 target, and it’s very easy to reproduce by just compiling the code that I posted before.
That's some good detective work; it definitely explains what you're
seeing. Since MSP430 is affected it would probably be pretty easy to
upstream an alignment-aware
2019 May 13
3
How to change CLang struct alignment behaviour?
Hi Joan,
On Mon, 13 May 2019 at 18:01, Joan Lluch <joan.lluch at icloud.com> wrote:
> After looking at it a bit further, I think this is a Clang thing. Clang issues “align 2” if the struct has at least one int (2 bytes), but also if the entire struct size is multiple of 2. For example a struct with 4 char members. In these cases the LLVM backend correctly creates word sized load/stores
2015 Nov 20
4
[GlobalISel] A Proposal for global instruction selection
> On Nov 19, 2015, at 4:58 PM, Eric Christopher <echristo at gmail.com> wrote:
>
>
>
> On Thu, Nov 19, 2015 at 2:26 PM Quentin Colombet <qcolombet at apple.com <mailto:qcolombet at apple.com>> wrote:
> Hi Eric,
>
>
>> On Nov 19, 2015, at 12:46 PM, Eric Christopher <echristo at gmail.com <mailto:echristo at gmail.com>> wrote:
>>
2017 Jun 15
9
About CodeGen quality
Hi Mats,
It's private backend. I will try describing what I am dealing with.
struct S {
unsigned int a : 8;
unsigned int b : 8;
unsigned int c : 8;
unsigned int d : 8;
unsigned int e;
}
We want to read S->b for example. The size of struct S is 64 bits, and
seems LLVM treats it as i64.
Below is the IR corresponding to S->b, IIRC.
%0 = load