search for: expandiselpseudo

...place expansion in > expandPostRAPseudo > > Would it be possible to call this same code during instruction selection? > > When I emitting the code for certain formats, I would need to call some emitter which basically the same kind of I'm calling from expandPostRAPseudo now. expandISelPseudos is the place to cleanup after ISEL hacks, and can create BBs. But, as Cameron explained well in the other thread, if you want a macro assembler for some sequences, do it late in expandPostRAPseudos. -Andy >>> On Feb 16, 2013, at 1:08 PM, Reed Kotler <rkotler at mips.com> wrote: &g...

...; expandPostRAPseudo >> >> Would it be possible to call this same code during instruction selection? >> >> When I emitting the code for certain formats, I would need to call some emitter which basically the same kind of I'm calling from expandPostRAPseudo now. > > expandISelPseudos is the place to cleanup after ISEL hacks, and can > create BBs. But, as Cameron explained well in the other thread, if you > want a macro assembler for some sequences, do it late in > expandPostRAPseudos. > -Andy > I feel like I should expand things as soon as I have all the info...

> it should be expanded late: In lib/Target/X86/X86MCInstLower.cpp. This is exactly what I was missing. Thanks a ton! :) -- Sanjoy Das http://playingwithpointers.com

On Oct 18, 2011, at 2:33 PM, Sanjoy Das wrote: >> it should be expanded late: In lib/Target/X86/X86MCInstLower.cpp. > > This is exactly what I was missing. Thanks a ton! :) We have three pseudo expansion passes: 1. ExpandISelPseudos.cpp - For instructions that may need to create basic blocks, like CMOV and atomics. 2. ExpandPostRAPseudos.cpp - For instructions used to trick the register allocator into doing the right thing, and COPY instructions created by live range splitting. 3. *MCInstLower.cpp - For instructions that ne...

Hi, All, I want to add one intrinsic function for my particular backend. Let's say the intrinsic function is named "foo" which takes two i32 inputs and has one i32 output. First, I add this line "def int_foo : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrReadArgMem]>;" in /include/llvm/IR/Intrinsics.td. Then, in my target/InstrInfo.td, I'm supposed

...7 PM, Phil Tomson wrote: > >> >> First off, I got this idea from the LLVM Cookbook chapter 8: Writing an >> LLVM Backend: Lowering to multiple instructions. (now I'm having my >> doubts as to whether this is the right approach) >> > > There is a pass "ExpandISelPseudos", which handles instructions with > custom inserters. You can mark instructions as having custom inserters in > the .td files and then override the EmitInstrWithCustomInserter function to > deal with them. > > > > Let me explain at the assembly level what I'm trying...

...lund Olesen wrote: > > On Oct 18, 2011, at 2:33 PM, Sanjoy Das wrote: > >>> it should be expanded late: In lib/Target/X86/X86MCInstLower.cpp. >> >> This is exactly what I was missing. Thanks a ton! :) > > We have three pseudo expansion passes: > > 1. ExpandISelPseudos.cpp - For instructions that may need to create basic blocks, like CMOV and atomics. > > 2. ExpandPostRAPseudos.cpp - For instructions used to trick the register allocator into doing the right thing, and COPY instructions created by live range splitting. > > 3. *MCInstLower.cpp - For...

On Wed, Jan 13, 2016 at 2:08 PM, Krzysztof Parzyszek via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 1/13/2016 2:26 PM, Phil Tomson via llvm-dev wrote: > >> I've got this PseudoOp defined: >> >> def SDT_RELADDR : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisInt<1>]>; >> def XSTGRELADDR :

On 02/17/2013 12:48 PM, Andrew Trick wrote: > On Feb 16, 2013, at 1:31 PM, Cameron Zwarich <zwarich at apple.com> wrote: > >> That's exactly the right place. > Really? You don't want the expansion to be optimized? You want to specify a machine model for the pseudo's as if they're real instructions? You don't want to schedule or register allocate the real

...and then create my pseudo-instruction > definition based on it. > > When your intrinsic is correctly translated into pseudo-instruction, you > can use it where you want. If you need to convert it into real > instructions, there's some common place to do it. > > You have the ExpandISelPseudos pass which is called at the beginning of > addMachinePasses. Its operation is relatively simple since it browses the > MachineInstr by looking for pseudo-instructions and then calls > TargetLowering::EmitInstrWithCustomeInserter for each of them. This last > method being abstract, it i...

On Feb 16, 2013, at 1:31 PM, Cameron Zwarich <zwarich at apple.com> wrote: > That's exactly the right place. Really? You don't want the expansion to be optimized? You want to specify a machine model for the pseudo's as if they're real instructions? You don't want to schedule or register allocate the real instructions? -Andy > On Feb 16, 2013, at 1:08 PM, Reed

> The semantics around inlining alone are problematic enough to warrant serious hesitation. There are nicer ways to embed CPS call/return into LLVM; I just figured that there would not be much support for adding a new terminator because it would change a lot of code. Ideally we would have a block terminator like: cps call ghccc @bar (.. args ..) returnsto label %retpt Where the

...rts build llvm[2]: Compiling ExecutionDepsFix.cpp for Release+Asserts build llvm[2]: Compiling GDBRegistrationListener.cpp for Release+Asserts build llvm[2]: Compiling SectionMemoryManager.cpp for Release+Asserts build llvm[2]: Compiling TargetSelect.cpp for Release+Asserts build llvm[2]: Compiling ExpandISelPseudos.cpp for Release+Asserts build llvm[2]: Building Release+Asserts Archive Library libLLVMExecutionEngine.a make[2]: Leaving directory '/home/NIKHILREDDY/WORK/LLVM_OBJ/lib/ExecutionEngine' make[3]: Entering directory '/home/NIKHILREDDY/WORK/LLVM_OBJ/lib/Transforms/ObjCARC' llvm[3]: Co...