Displaying 4 results from an estimated 4 matches for "expandbitcount".
2008 Feb 20
1
[LLVMdev] ctpop intrinsic question
Hello,
is it correct, that the "llvm.ctpop" Hamming weight intrinsic is
currently (LLVM 2.2) implemented in
Line 254 in lib/CodeGen/IntrinsicLowering.cpp
/// LowerCTPOP - Emit the code to lower ctpop of V before the specified
/// instruction IP.
static Value *LowerCTPOP(Value *V, Instruction *IP) {
assert(V->getType()->isInteger() && "Can't ctpop a
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
> Can you explain why you chose the approach of using a new pass?
> I pictured removing LegalizeDAG's type legalization code would
> mostly consist of finding all the places that use TLI.getTypeAction
> and just deleting code for handling its Expand and Promote. Are you
> anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote:
> On Wed, May 20, 2009 at 1:19 PM, Eli Friedman
> <eli.friedman at gmail.com> wrote:
>
>> Per subject, this patch adding an additional pass to handle vector
>>
>> operations; the idea is that this allows removing the code from
>>
>> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...p;Hi);
- SDValue ExpandIntToFP(bool isSigned, MVT DestTy, SDValue Source, DebugLoc dl);
SDValue EmitStackConvert(SDValue SrcOp, MVT SlotVT, MVT DestVT, DebugLoc dl);
SDValue ExpandBUILD_VECTOR(SDNode *Node);
@@ -306,12 +165,7 @@
SDValue ExpandBSWAP(SDValue Op, DebugLoc dl);
SDValue ExpandBitCount(unsigned Opc, SDValue Op, DebugLoc dl);
- bool ExpandShift(unsigned Opc, SDValue Op, SDValue Amt,
- SDValue &Lo, SDValue &Hi, DebugLoc dl);
- void ExpandShiftParts(unsigned NodeOp, SDValue Op, SDValue Amt,
- SDValue &Lo, SDValue &Hi, DebugL...