search for: expandatomiccmpxchg

...t .LBB0_4: orr w0, wzr, #0x1 ret GCC instead generates a ldaxr for the initial load, which seems more correct to me since it is honoring the requested failure case acquire ordering. I'd like to get other opinions on this before filing a bug. I believe the code in AtomicExpand::expandAtomicCmpXchg() is responsible for this discrepancy, since it only uses the failure case memory order for targets that use fences (i.e. when TLI->shouldInsertFencesForAtomic(CI) is true). -- Geoff Berry Employee of Qualcomm Datacenter Technologies, Inc. Qualcomm Datacenter Technologies, Inc. as an affi...