search for: exception_typ

...C:/InstantRails/ruby/lib/ruby/1.8/net\http.rb:1683: warning: already initialized constant RESPONSE_HAS_BODY C:/InstantRails/ruby/lib/ruby/1.8/net\http.rb:1793: warning: already initialized constant HAS_BODY C:/InstantRails/ruby/lib/ruby/1.8/net\http.rb:1794: warning: already initialized constant EXCEPTION_TYPE C:/InstantRails/ruby/lib/ruby/1.8/net\http.rb:1797: warning: already initialized constant HAS_BODY C:/InstantRails/ruby/lib/ruby/1.8/net\http.rb:1798: warning: already initialized constant EXCEPTION_TYPE C:/InstantRails/ruby/lib/ruby/1.8/net\http.rb:1801: warning: already initialized constant H...

...(h.root (), key) + ret_type, ret_value = h.value_value (val) + assert t == ret_type, \ + "expected type {0}, got {1}".format(t, ret_type) + assert exp_bytes == ret_value, \ + "expected value {0}, got {1}".format(exp_bytes, ret_value) + +def test_exception (exception_type, **kwargs): + try: + set_value (**kwargs) + raise AssertionError("expected {0}".format(exception_type)) + except exception_type: + pass + +# Good weather tests +test_pass (REG_BINARY, b"\x01\x02", b"\x01\x02") +test_pass (REG...

...ng) { + trace_kvm_inj_exception(vcpu->arch.exception.nr, + vcpu->arch.exception.has_error_code, + vcpu->arch.exception.error_code); + + WARN_ON_ONCE(vcpu->arch.exception.injected); + vcpu->arch.exception.pending = false; + vcpu->arch.exception.injected = true; + + if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT) + __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) | + X86_EFLAGS_RF); + + if (vcpu->arch.exception.nr == DB_VECTOR) { + kvm_deliver_exception_payload(vcpu); + if (vcpu->arch.dr7 & DR7_GD) { + vcpu->arch.dr7 &= ~DR7_GD; +...

...ng) { + trace_kvm_inj_exception(vcpu->arch.exception.nr, + vcpu->arch.exception.has_error_code, + vcpu->arch.exception.error_code); + + WARN_ON_ONCE(vcpu->arch.exception.injected); + vcpu->arch.exception.pending = false; + vcpu->arch.exception.injected = true; + + if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT) + __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) | + X86_EFLAGS_RF); + + if (vcpu->arch.exception.nr == DB_VECTOR) { + /* + * This code assumes that nSVM doesn't use + * check_nested_events(). If it does, the + * DR6/DR7 change...

On 26 September 2010 13:08, Eugene Toder <eltoder at gmail.com> wrote: >  %s = invoke i32 @v(i32 %o) to label %ok >                   unwind %x to label %catch > ok: >  ret i32 %s > > catch: >  %type = call i32 @exception_type(i8* %x) >  %r = icmp eq i32 %type, 255 ; 255 is DivisionByZeroException type >  br i1 %r, label %bad, label %worse > > bad: >  ret i32 -1 > > worse: >  ret i32 -2 > } That could be enough for SJ/LJ (I have no idea), but it certainly is not for Dwarf exceptions. When an...

...unwind i8* %ex } define i32 @g(i32 %o) { entry: ; invoke produces a different value depending on whether if ; branches to the success case or the failure case. %s = invoke i32 @v(i32 %o) to label %ok unwind %x to label %catch ok: ret i32 %s catch: %type = call i32 @exception_type(i8* %x) %r = icmp eq i32 %type, 255 ; 255 is DivisionByZeroException type br i1 %r, label %bad, label %worse bad: ret i32 -1 worse: ret i32 -2 } Nathan -- is this approach simpler than using intrinsics @eh.throw (assuming it's added) and @eh.exception? The latter seems more flexib...

Hi, When an integer argument is passed as value, node_set_value segfaults. Reproducer is at the end of this message The backtrace points at hivex-py.c, function get_value. While obj is non-NULL, `bytes = PyUnicode_AsUTF8String (obj);` returns NULL. Kind regards, Peter https://lekensteyn.nl #!/usr/bin/env python3 import hivex, sys h = hivex.Hivex(sys.argv[1]) print(h) val = {

Hi, This patch series is based on a prior patch[1], splitting off changes as requested and incorporating feedback from Richard Jones. It introduces type validation to avoid segmentation faults (instead, it reports an exception) and fixes handling of the bytes type in Python 3. Major changes since that series: - Drop newly introduced support for integer types for DWORD/QWORDS - Reject Unicode

On 25 September 2010 23:46, Nathan Jeffords <blunted2night at gmail.com> wrote: > catch: >   %v = ptrtoint i8 * %x to i32 >   %r = icmp eq i32 %v, 255 >   br i1 %r, label %bad, label %worse > bad: >   ret i32 -1 > worse: >   ret i32 -2 > } If I understood correctly, you're trying to pass the clean-up flag through %x directly on the invoke call. But later avoid

Hi guys, I have begun a modification to the invoke/unwind instructions. The following .ll file demonstrates the change. define i32 @v(i32 %o) { %r = icmp eq i32 %o, 0 br i1 %r, label %raise, label %ok ok: %m = mul i32 %o, 2 ret i32 %m raise: %ex = inttoptr i32 255 to i8 * ; unwind now takes an i8* "exception" pointer unwind i8* %ex } define i32 @g(i32 %o) { entry:

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VMs (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VMs (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VM-s (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VM-s (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place