search for: exception_table

...per.h index 4f76991..0e6b38e 100644 --- a/efi/wrapper.h +++ b/efi/wrapper.h @@ -102,12 +102,14 @@ struct extra_hdr { __uint32_t heap_commit_sz; __uint32_t loader_flags; __uint32_t rva_and_sizes_nr; - __uint64_t export_table; - __uint64_t import_table; - __uint64_t resource_table; - __uint64_t exception_table; - __uint64_t certification_table; - __uint64_t base_relocation_table; + struct { + __uint64_t export_table; + __uint64_t import_table; + __uint64_t resource_table; + __uint64_t exception_table; + __uint64_t certification_table; + __uint64_t base_relocation_table; + } data_directory; } __pac...

...per.h index 4f76991..0e6b38e 100644 --- a/efi/wrapper.h +++ b/efi/wrapper.h @@ -102,12 +102,14 @@ struct extra_hdr { __uint32_t heap_commit_sz; __uint32_t loader_flags; __uint32_t rva_and_sizes_nr; - __uint64_t export_table; - __uint64_t import_table; - __uint64_t resource_table; - __uint64_t exception_table; - __uint64_t certification_table; - __uint64_t base_relocation_table; + struct { + __uint64_t export_table; + __uint64_t import_table; + __uint64_t resource_table; + __uint64_t exception_table; + __uint64_t certification_table; + __uint64_t base_relocation_table; + } data_directory; } __pac...

The PE headers of the generated efi file were quite buggy. And since OVMF perform a few consistency checks, syslinux was unable to run on it. I don't pretend to have a thorough understanding of the PE+ headers, some bugs may remain. :) Celelibi (4): efi: Fix PE header field rva_and_sizes_nr efi: Location, size and alignment of .text section efi: Useless relocations in PE file efi: PE

The self_nmi() code cause''s an NMI to be triggered by sending an APIC message to the local processor. However, NMIs are blocked by the VMEXIT, until the next iret or VMENTER. Volume 3 Chapter 27 Section 1 of the Intel SDM states: An NMI causes subsequent NMIs to be blocked, but only after the VM exit completes. As a result, as soon as the VMENTER happens, an immediate VMEXIT happens

This set of patches converts the way frames gets created from using PUSHes/POPs to using MOVes, thus allowing (in certain cases) to avoid saving/restoring part of the register set. While the place where the (small) win from this comes from varies between CPUs, the net effect is a 1 to 2% reduction on a combined interruption entry and exit when the full state save can be avoided. 1: use MOV

...Disable the hardware NMI latch */ +1: + retq + +/* No op trap handler. Required for kexec crash path. This is not + * declared with the ENTRY() macro to avoid wasted alignment space. + */ +.globl trap_nop +trap_nop: + iretq + + + .section .rodata, "a", @progbits ENTRY(exception_table) diff -r ef8c1b607b10 -r 96b068439bc4 xen/include/asm-x86/desc.h --- a/xen/include/asm-x86/desc.h +++ b/xen/include/asm-x86/desc.h @@ -106,6 +106,21 @@ typedef struct { u64 a, b; } idt_entry_t; +/* Write the lower 64 bits of an IDT Entry. This relies on the upper 32 + * bits of the address...

...l. */ pushl %eax @@ -429,7 +429,7 @@ handle_exception: movl %esp,%edx pushl %edx # push the cpu_user_regs pointer GET_CURRENT(%ebx) - PERFC_INCR(PERFC_exceptions, %eax) + PERFC_INCR(PERFC_exceptions, %eax, %ebx) call *exception_table(,%eax,4) addl $4,%esp movl UREGS_eflags(%esp),%eax Index: 2007-03-19/xen/arch/x86/x86_64/asm-offsets.c =================================================================== --- 2007-03-19.orig/xen/arch/x86/x86_64/asm-offsets.c 2007-03-19 13:23:52.000000000 +0100 +++ 2007-03-19/xen...