search for: evo_data

...update) } static int +nv50_crtc_set_raster_vblank_dmi(struct nouveau_crtc *nv_crtc, u32 usec) +{ + struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); + u32 *push; + + push = evo_wait(mast, 8); + if (!push) + return -ENOMEM; + + evo_mthd(push, 0x0828 + (nv_crtc->index * 0x400), 1); + evo_data(push, usec); + evo_kick(push, mast); + + return 0; +} + +static int nv50_crtc_set_color_vibrance(struct nouveau_crtc *nv_crtc, bool update) { struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); @@ -1104,14 +1121,14 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umod...

...t; + >> + push = evo_wait(mast, 8); > > Just needs to be 2, no? Yes, doesn't matter too much though. > >> + if (!push) >> + return -ENOMEM; >> + >> + evo_mthd(push, 0x0828 + (nv_crtc->index * 0x400), 1); >> + evo_data(push, usec); >> + evo_kick(push, mast); >> + >> + return 0; >> +} >> + >> +static int >> nv50_crtc_set_color_vibrance(struct nouveau_crtc *nv_crtc, bool update) >> { >> struct nv50_mast *mast = nv50_mast(nv_crtc->base.de...

...+ vblankus *= 1000; > + vblankus /= mode->clock; When you rebase, can you move this calculation into the common code please :) > + > evo_mthd(push, 0x0804 + (nv_crtc->index * 0x400), 2); > evo_data(push, 0x00800000 | mode->clock); > evo_data(push, (ilace == 2) ? 2 : 0); > - evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 6); > + evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 8); >...

...d_atom *asyh) struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; struct nv50_head_mode *m = &asyh->mode; u32 *push; - if ((push = evo_wait(core, 12))) { + if ((push = evo_wait(core, 13))) { evo_mthd(push, 0x2064 + (head->base.index * 0x400), 5); evo_data(push, (m->v.active << 16) | m->h.active ); evo_data(push, (m->v.synce << 16) | m->h.synce ); evo_data(push, (m->v.blanke << 16) | m->h.blanke ); evo_data(push, (m->v.blanks << 16) | m->h.blanks ); evo_data(push, (m->v.blank2e <...

...d_atom *asyh) struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; struct nv50_head_mode *m = &asyh->mode; u32 *push; - if ((push = evo_wait(core, 12))) { + if ((push = evo_wait(core, 13))) { evo_mthd(push, 0x2064 + (head->base.index * 0x400), 5); evo_data(push, (m->v.active << 16) | m->h.active ); evo_data(push, (m->v.synce << 16) | m->h.synce ); evo_data(push, (m->v.blanke << 16) | m->h.blanke ); evo_data(push, (m->v.blanks << 16) | m->h.blanks ); evo_data(push, (m->v.blank2e <...

...u/nv50_display.c index ae873d1..5beb352 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -1104,14 +1104,14 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode, evo_mthd(push, 0x0804 + (nv_crtc->index * 0x400), 2); evo_data(push, 0x00800000 | mode->clock); evo_data(push, (ilace == 2) ? 2 : 0); - evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 8); + evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 6); evo_data(push, 0x00000000); evo_data(push, (vactive << 16) | hactive); evo_data(p...

...t nv50_mast *mast = nv50_mast(nv_crtc->base.dev); > + u32 *push; > + > + push = evo_wait(mast, 8); Just needs to be 2, no? > + if (!push) > + return -ENOMEM; > + > + evo_mthd(push, 0x0828 + (nv_crtc->index * 0x400), 1); > + evo_data(push, usec); > + evo_kick(push, mast); > + > + return 0; > +} > + > +static int > nv50_crtc_set_color_vibrance(struct nouveau_crtc *nv_crtc, bool update) > { > struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); > @@ -1104,14 +1121,14 @@ nv5...

...c +++ b/drm/nouveau/nv50_display.c @@ -1800,12 +1800,14 @@ nv50_head_lut_set(struct nv50_head *head, struct nv50_head_atom *asyh) if ((push = evo_wait(core, 7))) { if (core->base.user.oclass < G82_DISP_CORE_CHANNEL_DMA) { evo_mthd(push, 0x0840 + (head->base.index * 0x400), 2); - evo_data(push, 0xc0000000); + evo_data(push, asyh->base.depth == 8 ? + 0x80000000 : 0xc0000000); evo_data(push, asyh->lut.offset >> 8); } else if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA) { evo_mthd(push, 0x0840 + (head->base.index * 0x400), 2); - evo_...

...ush) { if (nv50_vers(mast) < NVD0_DISP_MAST_CLASS) { + /* XXX: Safe underestimate, even "0" works */ + vblankus = (vactive - mode->vdisplay - 2) * hactive; + vblankus *= 1000; + vblankus /= mode->clock; + evo_mthd(push, 0x0804 + (nv_crtc->index * 0x400), 2); evo_data(push, 0x00800000 | mode->clock); evo_data(push, (ilace == 2) ? 2 : 0); - evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 6); + evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 8); evo_data(push, 0x00000000); evo_data(push, (vactive << 16) | hactive); evo_data(p...

...ags & DRM_MODE_FLAG_INTERLACE) { vblan2e = vactive + vsynce + vbackp; vblan2s = vblan2e + (mode->vdisplay * vscan / ilace); @@ -1099,14 +1104,14 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode, evo_mthd(push, 0x0804 + (nv_crtc->index * 0x400), 2); evo_data(push, 0x00800000 | mode->clock); evo_data(push, (ilace == 2) ? 2 : 0); - evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 6); + evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 8); evo_data(push, 0x00000000); evo_data(push, (vactive << 16) | hactive); evo_data(p...

...too; it seems to assume the second parameter in evo_wait() is bytes, not words. > > > > >> + if (!push) > >> + return -ENOMEM; > >> + > >> + evo_mthd(push, 0x0828 + (nv_crtc->index * 0x400), 1); > > >> + evo_data(push, usec); > >> + evo_kick(push, mast); > >> + > >> + return 0; > >> +} > >> + > >> +static int > >> nv50_crtc_set_color_vibrance(struct nouveau_crtc *nv_crtc, bool > update) > >> { > >> stru...

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at ubuntu.com> --- diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index 3ed12a8cfc91..a4a586807903 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c +++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c @@ -370,6 +370,7 @@ nouveau_fbcon_create(struct drm_fb_helper *helper, ret = -ENOMEM; goto

..., 4 insertions(+), 11 deletions(-) diff --git a/drm/nouveau/nv50_display.c b/drm/nouveau/nv50_display.c index 0e8f4b76..6ce4467a 100644 --- a/drm/nouveau/nv50_display.c +++ b/drm/nouveau/nv50_display.c @@ -1813,7 +1813,7 @@ nv50_head_lut_set(struct nv50_head *head, struct nv50_head_atom *asyh) evo_data(push, asyh->lut.handle); } else { evo_mthd(push, 0x0440 + (head->base.index * 0x300), 4); - evo_data(push, 0x83000000); + evo_data(push, 0x81000000); evo_data(push, asyh->lut.offset >> 8); evo_data(push, 0x00000000); evo_data(push, 0x00000000); @@ -2214,16 +221...

Patch 1 and 2 implement wait-for-vblank, required to remove flicker when reclocking memory Patch 3 and 4 allow me to do things between waiting for VBLANK and disabling FB, like pause PFIFO and wait for the engines to idle. This minimises the time PFIFO is paused, thus maximises performance. The rest of the patches speak for themselves. As the actual memory reclocking script is still somewhat prone

...- u32 *push = evo_wait(&disp->core->chan, 2); > + struct nv50_core *core = disp->core; > + u32 interlock[NV50_DISP_INTERLOCK__SIZE] = {0}; > + u32 *push; > > - if (push) { > - evo_mthd(push, 0x008c, 1); > - evo_data(push, 0x0); > - evo_kick(push, &disp->core->chan); > - } > + core->func->ntfy_init(disp->sync, NV50_DISP_CORE_NTFY); > + > + push = evo_wait(&core->chan, 4); > + if (!push) > + return 0; > + > +...

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually

Patch 1 fixes nva3 bailing due to not finding the right ramcfg Patch 2 is a resend rebased on 3.17.0-rc4 for setting the vblank period Patch 3-5 handle writes to per-partition registers, for which NVA3 does not have special broadcast regs available. Patch 6 removes local structs from NVA3 reclocking in favour of the already existing "ram->base." variables, like in NVE0 As always,

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually

...t; > + struct nv50_core *core = disp->core; > > > + u32 interlock[NV50_DISP_INTERLOCK__SIZE] = {0}; > > > + u32 *push; > > > > > > - if (push) { > > > - evo_mthd(push, 0x008c, 1); > > > - evo_data(push, 0x0); > > > - evo_kick(push, &disp->core->chan); > > > - } > > > + core->func->ntfy_init(disp->sync, NV50_DISP_CORE_NTFY); > > > + > > > + push = evo_wait(&core->chan, 4); > > > +...

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually