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Hi, > Has anyone attempted the port of LLVM to a VLIW architecture? Is there > any publication about it? I have developed a derivation of MachineInstr class, called MachineInstrBundle, which is essnetially a VLIW-style machine instruction which can store any MI on each "slot". After the scheduling phase has grouped MIs in bundles, it has to call MIB->pack() method, which takes operands from the MIs in the "slots" and transfers them to the superinstruction. From this point on...

Has anyone attempted the port of LLVM to a VLIW architecture? Is there any publication about it? TIA -- Evandro Menezes Austin, TX emenezes at codeaurora.org Qualcomm Innovation Center, Inc is a member of Code Aurora Forum

...2011-09-20 at 16:02 +0200, Carlos Sánchez de La Lama wrote: > Hi, > > > Has anyone attempted the port of LLVM to a VLIW architecture? Is there > > any publication about it? > > I have developed a derivation of MachineInstr class, called > MachineInstrBundle, which is essnetially a VLIW-style machine > instruction which can store any MI on each "slot". After the scheduling > phase has grouped MIs in bundles, it has to call MIB->pack() method, > which takes operands from the MIs in the "slots" and transfers them to > the superinstruction....

...2011-09-20 at 16:02 +0200, Carlos Sánchez de La Lama wrote: > Hi, > > > Has anyone attempted the port of LLVM to a VLIW architecture? Is > > there any publication about it? > > I have developed a derivation of MachineInstr class, called > MachineInstrBundle, which is essnetially a VLIW-style machine > instruction which can store any MI on each "slot". After the > scheduling phase has grouped MIs in bundles, it has to call > MIB->pack() method, which takes operands from the MIs in the "slots" > and transfers them to the superinstruct...

...Carlos Sánchez de La Lama wrote: >> Hi, >> >>> Has anyone attempted the port of LLVM to a VLIW architecture? Is >>> there any publication about it? >> >> I have developed a derivation of MachineInstr class, called >> MachineInstrBundle, which is essnetially a VLIW-style machine >> instruction which can store any MI on each "slot". After the >> scheduling phase has grouped MIs in bundles, it has to call >> MIB->pack() method, which takes operands from the MIs in the "slots" >> and transfers them to t...

...Carlos Sánchez de La Lama wrote: >> Hi, >> >>> Has anyone attempted the port of LLVM to a VLIW architecture? Is >>> there any publication about it? >> >> I have developed a derivation of MachineInstr class, called >> MachineInstrBundle, which is essnetially a VLIW-style machine >> instruction which can store any MI on each "slot". After the >> scheduling phase has grouped MIs in bundles, it has to call >> MIB->pack() method, which takes operands from the MIs in the "slots" >> and transfers them to t...

...onverted to numerics. Like this: df <-data.frame(match.start=c(5,10,100,200),range.coordinates=c("1000-1050","1500-1555","5000-5050,6000-6180","100-150,200-260,600-900")) ## Note the following to convert the default factor to a character vector. This is essnetial! df[,2]<- as.character(df[,2]) numex <-gsub("-",",",df[,2],fixed=TRUE) ## convert dashes ## convert to a list of numeric vectors numex <-lapply(strsplit(numex,",",fixed = TRUE),as.numeric) ## Here's what you get: > numex [[1]] [1] 1000 1050 [[2]] [...

...rote: >>> Hi, >>> >>>> Has anyone attempted the port of LLVM to a VLIW architecture? Is >>>> there any publication about it? >>> >>> I have developed a derivation of MachineInstr class, called >>> MachineInstrBundle, which is essnetially a VLIW-style machine >>> instruction which can store any MI on each "slot". After the >>> scheduling phase has grouped MIs in bundles, it has to call >>> MIB->pack() method, which takes operands from the MIs in the "slots" >>> and tra...

...rote: >>> Hi, >>> >>>> Has anyone attempted the port of LLVM to a VLIW architecture? Is >>>> there any publication about it? >>> >>> I have developed a derivation of MachineInstr class, called >>> MachineInstrBundle, which is essnetially a VLIW-style machine >>> instruction which can store any MI on each "slot". After the >>> scheduling phase has grouped MIs in bundles, it has to call >>> MIB->pack() method, which takes operands from the MIs in the "slots" >>> and tra...

...gt;>>> >>>>> Has anyone attempted the port of LLVM to a VLIW architecture? Is >>>>> there any publication about it? >>>> >>>> I have developed a derivation of MachineInstr class, called >>>> MachineInstrBundle, which is essnetially a VLIW-style machine >>>> instruction which can store any MI on each "slot". After the >>>> scheduling phase has grouped MIs in bundles, it has to call >>>> MIB->pack() method, which takes operands from the MIs in the "slots" >>...

...t;>> > >>>> Has anyone attempted the port of LLVM to a VLIW architecture? Is > >>>> there any publication about it? > >>> > >>> I have developed a derivation of MachineInstr class, called > >>> MachineInstrBundle, which is essnetially a VLIW-style machine > >>> instruction which can store any MI on each "slot". After the > >>> scheduling phase has grouped MIs in bundles, it has to call > >>> MIB->pack() method, which takes operands from the MIs in the "slots" >...

...chez de La Lama wrote: >>> Hi, >>> >>>> Has anyone attempted the port of LLVM to a VLIW architecture? Is >>>> there any publication about it? >>> I have developed a derivation of MachineInstr class, called >>> MachineInstrBundle, which is essnetially a VLIW-style machine >>> instruction which can store any MI on each "slot". After the >>> scheduling phase has grouped MIs in bundles, it has to call >>> MIB->pack() method, which takes operands from the MIs in the "slots" >>> and transfe...

...t;>> > >>>> Has anyone attempted the port of LLVM to a VLIW architecture? Is > >>>> there any publication about it? > >>> > >>> I have developed a derivation of MachineInstr class, called > >>> MachineInstrBundle, which is essnetially a VLIW-style machine > >>> instruction which can store any MI on each "slot". After the > >>> scheduling phase has grouped MIs in bundles, it has to call > >>> MIB->pack() method, which takes operands from the MIs in the "slots" >...

...gt;>>> >>>>> Has anyone attempted the port of LLVM to a VLIW architecture? Is >>>>> there any publication about it? >>>> >>>> I have developed a derivation of MachineInstr class, called >>>> MachineInstrBundle, which is essnetially a VLIW-style machine >>>> instruction which can store any MI on each "slot". After the >>>> scheduling phase has grouped MIs in bundles, it has to call >>>> MIB->pack() method, which takes operands from the MIs in the "slots" >>&...

...>>>>>> Has anyone attempted the port of LLVM to a VLIW architecture? Is >>>>>> there any publication about it? >>>>> >>>>> I have developed a derivation of MachineInstr class, called >>>>> MachineInstrBundle, which is essnetially a VLIW-style machine >>>>> instruction which can store any MI on each "slot". After the >>>>> scheduling phase has grouped MIs in bundles, it has to call >>>>> MIB->pack() method, which takes operands from the MIs in the "slots"...

...;>>>>> Has anyone attempted the port of LLVM to a VLIW architecture? Is >>>>>> there any publication about it? >>>>> >>>>> I have developed a derivation of MachineInstr class, called >>>>> MachineInstrBundle, which is essnetially a VLIW-style machine >>>>> instruction which can store any MI on each "slot". After the >>>>> scheduling phase has grouped MIs in bundles, it has to call >>>>> MIB->pack() method, which takes operands from the MIs in the "slots&quot...

...;>>>>> Has anyone attempted the port of LLVM to a VLIW architecture? Is >>>>>> there any publication about it? >>>>> >>>>> I have developed a derivation of MachineInstr class, called >>>>> MachineInstrBundle, which is essnetially a VLIW-style machine >>>>> instruction which can store any MI on each "slot". After the >>>>> scheduling phase has grouped MIs in bundles, it has to call >>>>> MIB->pack() method, which takes operands from the MIs in the "slots&quot...

...ue, 2011-09-20 at 16:02 +0200, Carlos S?nchez de La Lama wrote: > Hi, > > > Has anyone attempted the port of LLVM to a VLIW architecture? Is there > > any publication about it? > > I have developed a derivation of MachineInstr class, called > MachineInstrBundle, which is essnetially a VLIW-style machine > instruction which can store any MI on each "slot". After the scheduling > phase has grouped MIs in bundles, it has to call MIB->pack() method, > which takes operands from the MIs in the "slots" and transfers them to > the superinstruction....