Displaying 2 results from an estimated 2 matches for "esenciatargetlowering".
2016 Mar 15
2
how to type-legalize a dag
...______________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>
I'd like to ask you another question (if you don't mind). My
EsenciaISelLowering.cpp contains the following code in the
EsenciaTargetLowering class constructor:
setOperationAction(ISD::BR_CC, MVT::i32, Custom);
setOperationAction(ISD::BR_CC, MVT::f32, Custom);
setOperationAction(ISD::BR_JT, MVT::Other, Expand);
setOperationAction(ISD::BRCOND, MVT::Other, Expand);
setOperationActio...
2016 Mar 15
3
how to type-legalize a dag
I have added new instructions to my target, unfortunately they are not
being properly type legalized. The instructions I've added are a vector
add, vector load and a vector store. Can anyone lend a hand on how to
legalize them so that my target would be able to recognize them.
Below is the output of llc with a -debug-only=isel. As you could see the
output type for load, store, and add changes