Displaying 6 results from an estimated 6 matches for "erval".
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rval
2006 Sep 28
1
Nonlinear fitting - reparametrization help
...e.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
x=seq(-10,10,length=1000)
a0=0;
ae=1;
me=0;
se=1;
ai=0.5;
mi=0;
si=3;
dogy <- function(x,a0,ae,me,se,ai,mi,si){
y=a0+ae*exp(-0.5*(((x-me)/se)^2))-ai*exp(-0.5*(((x-mi)/si)^2))
y}
y=dogy(x,a0,ae,me,se,ai,mi,si)
erval=rnorm(length(y),sd=0.02)
y=y+erval
#plot(x,y+erval)
#fit=nls(y~ae*exp((x/se)^2)-ai*exp((x/si)^2),start=c(ae=.8,se=1.1,ai=.2,si=1),trace=TRUE)
#here I tried to unsuccesfully reduce the model by eliminating A0, Mu1,
and Mu2
2012 Jun 08
2
[LLVMdev] Strong vs. default phi elimination and single-reg classes
...Insert,Remove}Branch should be fixable.
I don't think that the problem was with those functions. Adding support
for BDNZ and friends in those functions just enabled other passes to
start moving the blocks around, and that seems to have exposed problems
of its own. For example, sometimes LiveIntervals asserts with:
register:
%CTR8
clang: /llvm-trunk/lib/CodeGen/LiveIntervalAnalysis.cpp:446:
void llvm::LiveInterval
s::handlePhysicalRegisterDef(llvm::MachineBasicBlock*,
llvm::MachineBasicBlock::iterator, llvm::SlotIndex,
llvm::MachineOperand&, llvm::LiveInt erval&): Assert...
2012 Jun 08
0
[LLVMdev] Strong vs. default phi elimination and single-reg classes
On Jun 7, 2012, at 10:54 PM, Hal Finkel wrote:
> For example, sometimes LiveIntervals asserts with:
> register:
> %CTR8
> clang: /llvm-trunk/lib/CodeGen/LiveIntervalAnalysis.cpp:446:
> void llvm::LiveInterval
> s::handlePhysicalRegisterDef(llvm::MachineBasicBlock*,
> llvm::MachineBasicBlock::iterator, llvm::SlotIndex,
> llvm::MachineOperand&,...
2012 Jun 08
2
[LLVMdev] Strong vs. default phi elimination and single-reg classes
On Fri, 8 Jun 2012 08:49:32 -0700
Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote:
>
> On Jun 7, 2012, at 10:54 PM, Hal Finkel wrote:
>
> > For example, sometimes LiveIntervals asserts with:
> > register:
> > %CTR8
> > clang: /llvm-trunk/lib/CodeGen/LiveIntervalAnalysis.cpp:446:
> > void llvm::LiveInterval
> > s::handlePhysicalRegisterDef(llvm::MachineBasicBlock*,
> > llvm::MachineBasicBlock::iterator, llvm::SlotIndex,
&...
2012 Jun 08
0
[LLVMdev] Strong vs. default phi elimination and single-reg classes
On Jun 7, 2012, at 7:31 PM, Hal Finkel wrote:
> 112B BB#1: derived from LLVM BB %for.body, ADDRESS TAKEN
> Predecessors according to CFG: BB#0 BB#1
> %vreg12<def> = PHI %vreg13, <BB#1>, %vreg11, <BB#0>;CTRRC8:%vreg12,%vreg13,%vreg11
> %vreg13<def> = COPY %vreg12<kill>; CTRRC8:%vreg13,%vreg12
> %vreg13<def> = BDNZ8 %vreg13,
2012 Jun 08
2
[LLVMdev] Strong vs. default phi elimination and single-reg classes
Hello again,
I am trying to implement an optimization pass for PowerPC such that
simple loops use the special "counter register" (CTR) to track the
induction variable. This is helpful because, in addition to reducing
register pressure, there is a combined decrement-compare-and-branch
instruction BZND (there are also other related instructions).
I started this process by converting the