Displaying 10 results from an estimated 10 matches for "err_nomem1".
2013 Jul 25
0
[PATCH 1/5] Intel MIC Host Driver for X100 family.
...ero for success.
+ */
+static int mic_setup_msix(struct mic_device *mdev)
+{
+ struct pci_dev *pdev = mdev->pdev;
+ int rc, i;
+
+ mdev->irq_info.msix_entries = kmalloc(sizeof(struct msix_entry) *
+ MIC_MIN_MSIX, GFP_KERNEL);
+ if (!mdev->irq_info.msix_entries) {
+ rc = -ENOMEM;
+ goto err_nomem1;
+ }
+
+ for (i = 0; i < MIC_MIN_MSIX; i++)
+ mdev->irq_info.msix_entries[i].entry = i;
+
+ rc = pci_enable_msix(pdev, mdev->irq_info.msix_entries,
+ MIC_MIN_MSIX);
+ if (rc) {
+ dev_dbg(&pdev->dev, "Error enabling MSIx. rc = %d\n", rc);
+ goto err_enable_msix;
+ }
+
+...
2013 Sep 06
0
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
..., i;
- mdev->irq_info.msix_entries = kmalloc(sizeof(struct msix_entry) *
- MIC_MIN_MSIX, GFP_KERNEL);
+ mdev->irq_info.msix_entries = kmalloc_array(MIC_MIN_MSIX,
+ sizeof(struct msix_entry),
+ GFP_KERNEL);
if (!mdev->irq_info.msix_entries) {
rc = -ENOMEM;
goto err_nomem1;
@@ -231,8 +233,9 @@ static int mic_setup_callbacks(struct mic_device *mdev)
{
int i;
- mdev->irq_info.cb_list = kmalloc(sizeof(struct list_head) *
- MIC_NUM_OFFSETS, GFP_KERNEL);
+ mdev->irq_info.cb_list = kmalloc_array(MIC_NUM_OFFSETS,
+ sizeof(struct list_head),
+...
2013 Sep 05
16
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Sep 05
16
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Aug 21
10
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Aug 21
10
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Jul 25
16
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
An Intel MIC X100 device is a PCIe form factor add-in coprocessor
card based on the Intel Many Integrated Core (MIC) architecture
that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
implements the three required standard address spaces i.e. configuration,
memory and I/O. The host OS loads a device driver as is typical for
PCIe devices. The card itself runs a bootstrap after
2013 Jul 25
16
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
An Intel MIC X100 device is a PCIe form factor add-in coprocessor
card based on the Intel Many Integrated Core (MIC) architecture
that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
implements the three required standard address spaces i.e. configuration,
memory and I/O. The host OS loads a device driver as is typical for
PCIe devices. The card itself runs a bootstrap after
2013 Aug 08
10
[PATCH v2 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v1 => v2:
a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring
into 3 smaller patches and function renames, as per feedback from
Greg Kroah-Hartman.
b) Use VRINGH infrastructure for accessing virtio rings from the host
in patch 5, as per feedback from Michael S. Tsirkin.
v1: Initial post @ https://lkml.org/lkml/2013/7/24/810
Description:
2013 Aug 08
10
[PATCH v2 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v1 => v2:
a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring
into 3 smaller patches and function renames, as per feedback from
Greg Kroah-Hartman.
b) Use VRINGH infrastructure for accessing virtio rings from the host
in patch 5, as per feedback from Michael S. Tsirkin.
v1: Initial post @ https://lkml.org/lkml/2013/7/24/810
Description: