search for: err_clk

...eau/nvkm/engine/device/tegra.c index 9afa5f3e3c1c..ec12efb4689a 100644 --- a/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drm/nouveau/nvkm/engine/device/tegra.c @@ -35,6 +35,11 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev) ret = clk_prepare_enable(tdev->clk); if (ret) goto err_clk; + if (tdev->clk_ref) { + ret = clk_prepare_enable(tdev->clk_ref); + if (ret) + goto err_clk_ref; + } ret = clk_prepare_enable(tdev->clk_pwr); if (ret) goto err_clk_pwr; @@ -57,6 +62,9 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev) err_clamp: clk_disable_unprep...

...+ +#include "nouveau_drm.h" +#include "nouveau_platform.h" + +static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) +{ + int err; + + err = regulator_enable(gpu->vdd); + if (err) + goto err_power; + + err = clk_prepare_enable(gpu->clk); + if (err) + goto err_clk; + err = clk_prepare_enable(gpu->clk_pwr); + if (err) + goto err_clk_pwr; + clk_set_rate(gpu->clk_pwr, 204000000); + udelay(10); + + reset_control_assert(gpu->rst); + udelay(10); + + err = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); + if (err) + goto err_clamp; + udelay(10); + +...

...for peri\n"); + err = PTR_ERR(slim_rproc->peri); + goto err; + } + + err = slim_clk_get(slim_rproc, dev); + if (err) + goto err; + + /* Register as a remoteproc device */ + err = rproc_add(rproc); + if (err) { + dev_err(dev, "registration of slim remoteproc failed\n"); + goto err_clk; + } + + return slim_rproc; + +err_clk: + for (i = 0; i < ST_SLIM_MAX_CLK && slim_rproc->clks[i]; i++) + clk_put(slim_rproc->clks[i]); +err: + rproc_put(rproc); + return ERR_PTR(err); +} +EXPORT_SYMBOL(st_slim_rproc_alloc); + +/** + * st_slim_rproc_put() - put slim rproc resource...

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. This version is mostly identical to v2 but fixes an important issue: the drvdata must be set to the drm_device for sysfs to work, so the platform device structure now includes the

...t; + goto err; > + } > + > + err = slim_clk_get(slim_rproc, dev); > + if (err) > + goto err; > + > + /* Register as a remoteproc device */ > + err = rproc_add(rproc); > + if (err) { > + dev_err(dev, "registration of slim remoteproc failed\n"); > + goto err_clk; > + } > + > + return slim_rproc; > + > +err_clk: > + for (i = 0; i < ST_SLIM_MAX_CLK && slim_rproc->clks[i]; i++) > + clk_put(slim_rproc->clks[i]); > +err: > + rproc_put(rproc); > + return ERR_PTR(err); > +} > +EXPORT_SYMBOL(st_slim_rproc_alloc...

...t; + goto err; > + } > + > + err = slim_clk_get(slim_rproc, dev); > + if (err) > + goto err; > + > + /* Register as a remoteproc device */ > + err = rproc_add(rproc); > + if (err) { > + dev_err(dev, "registration of slim remoteproc failed\n"); > + goto err_clk; > + } > + > + return slim_rproc; > + > +err_clk: > + for (i = 0; i < ST_SLIM_MAX_CLK && slim_rproc->clks[i]; i++) > + clk_put(slim_rproc->clks[i]); > +err: > + rproc_put(rproc); > + return ERR_PTR(err); > +} > +EXPORT_SYMBOL(st_slim_rproc_alloc...

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. Thanks to the input received for v1, this version is more self-contained and shares less stuff between nouveau_drm and nouveau_platform. The major change is that nouveau_platform is now

...rr = slim_clk_get(slim_rproc, dev); > > + if (err) > > + goto err; > > + > > + /* Register as a remoteproc device */ > > + err = rproc_add(rproc); > > + if (err) { > > + dev_err(dev, "registration of slim remoteproc failed\n"); > > + goto err_clk; > > + } > > + > > + return slim_rproc; > > + > > +err_clk: > > + for (i = 0; i < ST_SLIM_MAX_CLK && slim_rproc->clks[i]; i++) > > + clk_put(slim_rproc->clks[i]); > > +err: > > + rproc_put(rproc); > > + return ERR_PTR(err...

...u_platform.h" > + > +static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) > +{ > + int err; > + > + err = regulator_enable(gpu->vdd); > + if (err) > + goto err_power; > + > + err = clk_prepare_enable(gpu->clk); > + if (err) > + goto err_clk; > + err = clk_prepare_enable(gpu->clk_pwr); > + if (err) > + goto err_clk_pwr; > + clk_set_rate(gpu->clk_pwr, 204000000); > + udelay(10); > + > + reset_control_assert(gpu->rst); > + udelay(10); > + > + err = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D...

This patch series is the final (?) step towards the initial support of GK20A, allowing it to be probed and used (currently at a very slow speed, and for offscreen rendering only) on the Jetson TK1 and Venice 2 boards. The main piece if the first patch which adds platform devices probing support to Nouveau. There are probably lots of things that need to be discussed about it, e.g.: * The way the

.../engine/device/tegra.c index 6474bd2..bde8ab2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c @@ -64,8 +64,7 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev) err_clamp: clk_disable_unprepare(tdev->clk_pwr); err_clk_pwr: - if (tdev->clk_ref) - clk_disable_unprepare(tdev->clk_ref); + clk_disable_unprepare(tdev->clk_ref); err_clk_ref: clk_disable_unprepare(tdev->clk); err_clk: @@ -84,8 +83,7 @@ nvkm_device_tegra_power_down(struct nvkm_device_tegra *tdev) udelay(10); clk_disable_unprepare(t...

Hi Vinod, Bjorn, Patrice, This patchset adds support for the Flexible Direct Memory Access (FDMA) core found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU with a dedicated firmware. It is a general purpose DMA controller supporting 16 independent channels and data can be moved from memory to memory or between memory and paced latency critical real time targets. After quite

Hi Vinod, Bjorn, Patrice, This patchset adds support for the Flexible Direct Memory Access (FDMA) core found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU with a dedicated firmware. It is a general purpose DMA controller supporting 16 independent channels and data can be moved from memory to memory or between memory and paced latency critical real time targets. After quite

GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for its base engines after reworking secboot a bit to accomodate its calling convention better. This patchset has been tested rendering simple off-screen buffers using Mesa and yielded the expected result. Alexandre Courbot (15): secboot: allow to boot multiple falcons secboot: pass instance to LS firmware loaders secboot: