search for: eor

Displaying 20 results from an estimated 36 matches for "eor".

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2007 Jul 18
1
(PR#9796) write.dcf/read.dcf cycle converts missing entry
...quot; "NA" > [2,] "testB" "2.1" "NA" "testA" > [3,] "testC" "1.3.1" "NA" "NA" > With the attached write.dcf() it returns TRUE. > > The diff would be > 19,22c19,24 > < eor <- character(nr * nc) > < eor[seq.int(1, nr - 1) * nc] <- "\n" > < writeLines(paste(formatDL(rep.int(colnames(x), nr), c(t(x)), > < style = "list", width = width, indent = indent), eor, > --- >> tx <- t(x) >> not....
2007 Jul 17
0
write.dcf/read.dcf cycle converts missing entry to "NA" (PR#9796)
..." "0.1-1" "" "NA" [2,] "testB" "2.1" "NA" "testA" [3,] "testC" "1.3.1" "NA" "NA" With the attached write.dcf() it returns TRUE. The diff would be 19,22c19,24 < eor <- character(nr * nc) < eor[seq.int(1, nr - 1) * nc] <- "\n" < writeLines(paste(formatDL(rep.int(colnames(x), nr), c(t(x)), < style = "list", width = width, indent = indent), eor, --- > tx <- t(x) > not.na <- c(!is.na(tx)) >...
2018 Dec 07
2
Compiling for baremetal ARMv4 on Ubuntu Linux
...m_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:12:2: error: unknown directive .syntax unified ^ /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:25:3: error: invalid instruction mnemonic 'eor' eor r1, r0, r0, ror #16 ^~~ /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:26:15: error: unknown token in expression bic r1, r1, #0xff0000 ^ /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:27:3: error: unknown use of instruct...
2009 Nov 05
1
stepAIC(coxph) forward selection
Dear R-Help, I am trying to perform forward selection on the following coxph model: >my.bpfs <- Surv(bcox$pfsdays, bcox$pfscensor) > b.cox <- coxph(my.bpfs ~ Cbase + Abase + Cbave + CbSD + KPS + gender + as.factor(eor) + Age)>stepAIC(b.cox, scope=list(upper =~ Cbase + Abase + Cbave + CbSD + KPS + gender + as.factor(eor) + Age, lower=~1), direction= c("forward")) However the following code returns the full model. How do I write the code so that forward selection is performed? Thanks, Rupa [[alter...
2018 Dec 04
2
Compiling for baremetal ARMv4 on Ubuntu Linux
I am currently trying to compile a pretty simple program to work on an experimental board. It contains an (FPGA-version of) an ARMv4 processor. So basically, I try this (on my Ubuntu 18.04.1 LTS): clang -v --target=arm-none-eabi -c barehello.c -o barehelloCLANG.o clang -v --target=arm-none-eabi -c io.c -o io.o clang -v --target=arm-none-eabi barehelloCLANG.o io.o -o helloCLANGstatic -static
2018 Dec 10
2
Compiling for baremetal ARMv4 on Ubuntu Linux
...b/builtins/arm/bswapsi2.S >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:12:2: error: unknown directive >> .syntax unified >> ^ >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:25:3: error: invalid instruction mnemonic 'eor' >> eor r1, r0, r0, ror #16 >> ^~~ >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:26:15: error: unknown token in expression >> bic r1, r1, #0xff0000 >> ^ >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins...
2018 Dec 13
2
Compiling for baremetal ARMv4 on Ubuntu Linux
...b/builtins/arm/bswapsi2.S >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:12:2: error: unknown directive >> .syntax unified >> ^ >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:25:3: error: invalid instruction mnemonic 'eor' >> eor r1, r0, r0, ror #16 >> ^~~ >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:26:15: error: unknown token in expression >> bic r1, r1, #0xff0000 >> ^ >> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins...
2018 Dec 14
3
Compiling for baremetal ARMv4 on Ubuntu Linux
...builtins/arm/bswapsi2.S > > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:12:2: error: unknown directive > > .syntax unified > > ^ > > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:25:3: error: invalid instruction mnemonic 'eor' > > eor r1, r0, r0, ror #16 > > ^~~ > > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:26:15: error: unknown token in expression > > bic r1, r1, #0xff0000 > > ^ > > /home/llvm_all/llvm/projects/compiler-rt/lib/builti...
2009 Jul 14
4
[ActiveRecord::Base].collect {|a,b| ...} weirdness
...pecific to my setup or a global phenomenon. So far, ActiveRecord::Base and its descendants are the only classes with which I see this behaviour and furthermore it seems to be limited to Ruby 1.9.1. Mayday! Thanks, Niels (about to dig into array.c) $ ruby --version; rails --version; ruby <<EOR require "rubygems" gem "activerecord" require "activerecord" puts "\nActiveRecord::Base disappears:" [1,String,''foo'',ActiveRecord::Base].collect {|a,b| puts [a,b].inspect} puts "\nActiveRecord::Base stays:" [1,String,''fo...
2003 Mar 02
5
file header
I was wondering if there was a way to recompile ogg123 so that it didnt look for "Ogg" at the start of each file. Ie change it so it looked for "Dog" or something. Why you ask? because in theory Im not ment to have any music files on my work computer NFI why but just cant. If I could mask an ogg file to look like another file then I could beat the system. Assuming that they even know what Ogg Vorbis is. the bits in the header I would like to change are Ogg vorbis Xiphophorus libVorbi...
2019 Feb 04
2
Compiling for baremetal ARMv4 on Ubuntu Linux
...gt;> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:12:2: error: unknown directive > >>> .syntax unified > >>> ^ > >>> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:25:3: error: invalid instruction mnemonic 'eor' > >>> eor r1, r0, r0, ror #16 > >>> ^~~ > >>> /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:26:15: error: unknown token in expression > >>> bic r1, r1, #0xff0000 > >>> ^ > >>>...
2019 Mar 04
2
Compiling for baremetal ARMv4 on Ubuntu Linux
...s/compiler-rt/lib/builtins/arm/bswapsi2.S > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:12:2: error: unknown directive > .syntax unified > ^ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:25:3: error: invalid instruction mnemonic 'eor' > eor r1, r0, r0, ror #16 > ^~~ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:26:15: error: unknown token in expression > bic r1, r1, #0xff0000 > ^ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:27:3: er...
2012 May 24
0
[LLVMdev] MC Hammer Test results
...defined and predictable. - The generated bitpattern is defined. - The generated bitpattern differs from the reference bitpattern. - for LLVM r157187 (updated at 2012-05-21 14:18:06 BST.) - for LLVM built with no assertions[2] The full log from MC Hammer is very large (>16GB) this is theoretically available on request. Of more interest, is the attached triaged summary of these logs, showing that there are six bugs of this kind found (summary from log reproduced below [3]). If anyone is interested in seeing the results for any particular slice of the test space then I will consider...
2019 Mar 11
2
Compiling for baremetal ARMv4 on Ubuntu Linux
...s/compiler-rt/lib/builtins/arm/bswapsi2.S > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:12:2: error: unknown directive > .syntax unified > ^ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:25:3: error: invalid instruction mnemonic 'eor' > eor r1, r0, r0, ror #16 > ^~~ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:26:15: error: unknown token in expression > bic r1, r1, #0xff0000 > ^ > /home/llvm_all/llvm/projects/compiler-rt/lib/builtins/arm/bswapsi2.S:27:3: er...
2010 Sep 05
0
[LLVMdev] Possible missed optimization?
...g-only=regcoalescing to see what is going wrong. If you want to take a look at this yourself, the issue is easy to reproduce with Thumb1: $ cat > test.c typedef unsigned long long t; t foo(t a, t b) { t a4 = b^a^18; return a4; } $ clang -cc1 -triple thumbv5-u-u -S -O2 test.c -o - [...] eors r1, r3 mov r3, r0 eors r3, r2 movs r0, #18 eors r0, r3 bx lr [...] -Eli
2009 Jun 25
2
[LLVMdev] bitwise AND selector node not commutative?
..., r0, r1 %tmp1 = xor i32 4294967295, %b ; %tmp2 = or i32 %tmp1, %a -- > orn r0, r0, r1 %tmp = xor i32 %b, 4294967295 ; %tmp1 = and i32 %a, %tmp -- > bic r0, r0, r1 But this doesn't: %tmp = xor i32 %b, 4294967295 ; %tmp1 = and i32 %tmp, %a -- > eor r1, r1, #4294967295 ; and r0, r1, r0 On the surface it seems that the selector is not commuting the AND operands. I've attached the complete test files. I can take a look but I need a pointer to get started. David -------------- next part -------------- An HTML attachment was scrubbed...
2004 Jan 03
11
How do I get Winbind accounts in LDAP?
I've seen this posting before but I need to get a grasp on this. I am using winbindd for users that don't have a local account on a Linux box. I thought that placing the entries below in the smb.conf would create users in ou=Idmap. Instead the ou=Idmap increments the uidNumber with every user that is added,but the user ID mappings are stored in /usr/local/var/locks/winbindd_idmap.tdb. What
2009 Jun 26
0
[LLVMdev] bitwise AND selector node not commutative?
...967295, %b ; %tmp2 = or i32 %tmp1, %a -- > > orn r0, r0, r1 > %tmp = xor i32 %b, 4294967295 ; %tmp1 = and i32 %a, %tmp -- > > bic r0, r0, r1 > > But this doesn't: > > %tmp = xor i32 %b, 4294967295 ; %tmp1 = and i32 %tmp, %a -- > > eor r1, r1, #4294967295 ; and r0, r1, r0 > > On the surface it seems that the selector is not commuting the AND > operands. I've attached the complete test files. I can take a look > but I need a pointer to get started. No, isel is trying to commute the AND. See ARMGenDAGISel.inc (...
2010 Dec 02
0
[LLVMdev] Register Pairing
Hi Borja, > Without doing what i mentioned and letting LLVM expand all operations wider > than 8 bits as you asked, the code produced is excellent supposing that many > of the moves there should be 16 bit moves reducing code size and right > register allocation, also something important for me is that the code is > better than gcc's. When i say right reg allocation it doesnt
2012 Feb 13
0
[PATCH 05/14] arm: implement exception and hypercall entries.
...vector_und +.swi: .long vector_swi +.pabt: .long vector_pabt +.dabt: .long vector_dabt +.adx: .long vector_reserved +.irq: .long vector_irq +.fiq: .long vector_fiq + + .align 5 +vector_reset: +1: + b 1b + + .align 5 +vector_irq: + SAVE_CONTEXT 0x18, 4 + + mrs r0, spsr + and r0, r0, #PSR_MODE_MASK + eors r0, r0, #PSR_MODE_SVC + + bne return_to_guest + + cpsid i + + RESTORE_CONTEXT + + .align 5 +vector_dabt: + str r0, [sp, #-16] + str lr, [sp, #-12] + mrs r0, spsr + str r0, [sp, #-8] + sub r0, sp, #16 + + msr cpsr_cxsf, #(PSR_I_BIT | PSR_F_BIT | PSR_MODE_SVC) + + sub sp, sp, #CT...