search for: envyas

...SH_DATA (push, 256); >> + PUSH_DATA (push, (pNv->scratch->offset + PVP_DATA) >> 32); > > > No PUSH_DATAh in the DDX? Nope. Didn't feel the burning need to add a helper either. >> $(filter %nvc0.vpc,$(SHADERS)): %.vpc: %.vp >> - cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m nvc0 -o $@ >> + cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m gf100 -V gf100 >> -o $@ >> $(filter %nvc0.fpc,$(SHADERS)): %.fpc: %.fp >> - cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w...

...rtions(+), 6 deletions(-) diff --git a/src/shader/Makefile b/src/shader/Makefile index 46658e9..2d789be 100644 --- a/src/shader/Makefile +++ b/src/shader/Makefile @@ -24,20 +24,21 @@ NVF0_SHADERS = xfrm2nvf0.vpc \ videonvf0.fpc SHADERS = $(NVC0_SHADERS) $(NVE0_SHADERS) $(NVF0_SHADERS) +ENVYAS ?= envyas all: $(SHADERS) $(filter %nvc0.vpc,$(SHADERS)): %.vpc: %.vp - cpp -DENVYAS $< | sed -e '/^#/d' | envyas -w -m nvc0 -o $@ + cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m nvc0 -o $@ $(filter %nvc0.fpc,$(SHADERS)): %.fpc: %.fp - cpp -DENVYAS $< | sed -e &...

...0.fpc \ + exacmnv110.fpc \ + exacanv110.fpc \ + exasanv110.fpc \ + exas8nv110.fpc \ + exac8nv110.fpc \ + videonv110.fpc -SHADERS = $(NVC0_SHADERS) $(NVE0_SHADERS) $(NVF0_SHADERS) +SHADERS = $(NVC0_SHADERS) $(NVE0_SHADERS) $(NVF0_SHADERS) $(NV110_SHADERS) ENVYAS ?= envyas all: $(SHADERS) $(filter %nvc0.vpc,$(SHADERS)): %.vpc: %.vp - cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m nvc0 -o $@ + cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m gf100 -V gf100 -o $@ $(filter %nvc0.fpc,$(SHADERS)): %.fpc: %.fp - cpp -DENVYAS $&l...

...ET_SUBINTR 0x00000800 > #define NV_PPWR_INTR_EN_SET_WATCHDOG 0x00000002 > #define NV_PPWR_INTR_EN_CLR 0x0014 > -#define NV_PPWR_INTR_EN_CLR_MASK /* fuck i hate envyas */ -1 > +#define NV_PPWR_INTR_EN_CLR_MASK /* hug i hate envyas */ -1 Can you also capitalize the "i" please? Thanks, Diego

...0.fpc \ + exacmnv110.fpc \ + exacanv110.fpc \ + exasanv110.fpc \ + exas8nv110.fpc \ + exac8nv110.fpc \ + videonv110.fpc -SHADERS = $(NVC0_SHADERS) $(NVE0_SHADERS) $(NVF0_SHADERS) +SHADERS = $(NVC0_SHADERS) $(NVE0_SHADERS) $(NVF0_SHADERS) $(NV110_SHADERS) ENVYAS ?= envyas all: $(SHADERS) $(filter %nvc0.vpc,$(SHADERS)): %.vpc: %.vp - cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m nvc0 -o $@ + cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m gf100 -V gf100 -o $@ $(filter %nvc0.fpc,$(SHADERS)): %.fpc: %.fp - cpp -DENVYAS $&l...

...exacanv110.fpc \ > + exasanv110.fpc \ > + exas8nv110.fpc \ > + exac8nv110.fpc \ > + videonv110.fpc > > -SHADERS = $(NVC0_SHADERS) $(NVE0_SHADERS) $(NVF0_SHADERS) > +SHADERS = $(NVC0_SHADERS) $(NVE0_SHADERS) $(NVF0_SHADERS) $(NV110_SHADERS) > ENVYAS ?= envyas > > all: $(SHADERS) > > $(filter %nvc0.vpc,$(SHADERS)): %.vpc: %.vp > - cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m nvc0 -o $@ > + cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m gf100 -V gf100 -o $@ > $(filter %nvc0.fpc,$(SHADERS)):...

...0x00000800 > > #define NV_PPWR_INTR_EN_SET_WATCHDOG 0x00000002 > > #define NV_PPWR_INTR_EN_CLR 0x0014 > > -#define NV_PPWR_INTR_EN_CLR_MASK /* fuck i hate envyas */ -1 > > +#define NV_PPWR_INTR_EN_CLR_MASK /* hug i hate envyas */ -1 > > Can you also capitalize the "i" please? Yeah, maybe I just change it as "/* I hate envyas */"? /Jarkko

...0x00000800 > > > #define NV_PPWR_INTR_EN_SET_WATCHDOG 0x00000002 > > > #define NV_PPWR_INTR_EN_CLR 0x0014 > > > -#define NV_PPWR_INTR_EN_CLR_MASK /* fuck i hate envyas */ -1 > > > +#define NV_PPWR_INTR_EN_CLR_MASK /* hug i hate envyas */ -1 > > > > Can you also capitalize the "i" please? > > Yeah, maybe I just change it as "/* I hate envyas */"? > > /Jarkko Yes, that looks better. Thanks, D...

I believe I've addressed all the feedback from the first time around, and also made fixes necessary for GM20x based on testing results. I believe now it should actually work for all GM10x and GM20x. Further, GP10x should be very easy to add, but without someone to actually test I didn't want to claim support for it. Ilia Mirkin (7): exa: add GM10x acceleration support hwdefs: update

...h GPU was negative. On the other hand, you don't > have a display hanging off the card, which greatly increases chances > of success. Feel free to join #nouveau on irc.freenode.net if you plan > on exploring this. I fetched that and tried to compile it. First failed because of missing envyas, which I compiled and installed. Then failed with some undefined symbol kind of error which right now I don't have the time to diagnose. If I can get this to compile I'll get back to this thread. Any recommendations on kernel version, compiler or whatever might work better for that branch...

...triggered all > kinds of random memory reclocking fails. > > Changes in fuc3 binaries are tue do opcode optimizations using shorter > opcodes when possible. Might I suggest the following wording for the commit: ---------------8<---------------- Fixes failure to compile with recent envyas as a result of the 'movw' alias being removed for v5. A bit of history: v3 only has a 16-bit sign-extended immediate mov op. In order to set the high bits, there's a separate 'sethi' op. envyas validates that the value passed to mov(imm) is between -0x8000 and 0x7fff. In order...

..._PPWR_INTR_EN_SET_SUBINTR 0x00000800 #define NV_PPWR_INTR_EN_SET_WATCHDOG 0x00000002 #define NV_PPWR_INTR_EN_CLR 0x0014 -#define NV_PPWR_INTR_EN_CLR_MASK /* fuck i hate envyas */ -1 +#define NV_PPWR_INTR_EN_CLR_MASK /* hug i hate envyas */ -1 #define NV_PPWR_INTR_ROUTE 0x001c #define NV_PPWR_TIMER_LOW 0x002c #define NV_PPWR_WATCHDOG_TIME...

...he other hand, you don't > > have a display hanging off the card, which greatly increases chances > > of success. Feel free to join #nouveau on irc.freenode.net if you plan > > on exploring this. > > I fetched that and tried to compile it. First failed because of missing envyas, > which I compiled and installed. Then failed with some undefined symbol kind > of error which right now I don't have the time to diagnose. I'm impressed you got this far. You shouldn't need envyas to build, by the way, only to regenerate after editing fuc source. So ... this i...

In order to comply with the CoC, replace **** with a hug. Jarkko Sakkinen (15): MIPS: replace **** with a hug Documentation: replace **** with a hug drm/nouveau: replace **** with a hug m68k: replace **** with a hug parisc: replace **** with a hug cpufreq: replace **** with a hug ide: replace **** with a hug media: replace **** with a hug mtd: replace **** with a hug

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 New nouveau DDX release. Ben Skeggs (1): Bump version to 1.0.12 Ilia Mirkin (14): copy: don't bother trying to create copy on pre-nva3 allow path to envyas binary to be specified kepler: remove unnecessary texbars, add live-only tex for nvf0 use defined method names where available nv50: explicitly disable ZETA buffer Check before trying a solid fill nv04-nv40: don't attempt to do 32-bit shifts older hardware pr...

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 New nouveau DDX release. Ben Skeggs (1): Bump version to 1.0.12 Ilia Mirkin (14): copy: don't bother trying to create copy on pre-nva3 allow path to envyas binary to be specified kepler: remove unnecessary texbars, add live-only tex for nvf0 use defined method names where available nv50: explicitly disable ZETA buffer Check before trying a solid fill nv04-nv40: don't attempt to do 32-bit shifts older hardware pr...

fixes compilation issues with recent envytools, because movw was removed from fuc5, because it doesn't exist there anymore. The current code is most likely broken for fuc5 hardware as well and might have triggered all kinds of random memory reclocking fails. Changes in fuc3 binaries are tue do opcode optimizations using shorter opcodes when possible. Signed-off-by: Karol Herbst <kherbst

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Ben Skeggs (5): nve0: explicitly ask kernel for copy2 object nvf0: recognise as supported chipset nvc0-nve0: split shader code from their headers nvc0-nve0: decompile shaders into their source, add basic build system nve0: envyas isn't overly clever.. avoid short-form instructions Dave Airlie (2): nouveau: attempt to fix zaphod since dri1 code removal nouveau: clean up nv entity index declarations. Emil Velikov (6): configure: require xorg-macros 1.8 nouveau: stop using dri1 function DRICreateP...

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Ben Skeggs (5): nve0: explicitly ask kernel for copy2 object nvf0: recognise as supported chipset nvc0-nve0: split shader code from their headers nvc0-nve0: decompile shaders into their source, add basic build system nve0: envyas isn't overly clever.. avoid short-form instructions Dave Airlie (2): nouveau: attempt to fix zaphod since dri1 code removal nouveau: clean up nv entity index declarations. Emil Velikov (6): configure: require xorg-macros 1.8 nouveau: stop using dri1 function DRICreateP...

On 01/03/16 23:38, Ilia Mirkin wrote: > On Tue, Mar 1, 2016 at 4:36 PM, Martin Peres <martin.peres at free.fr> wrote: >> On 26/02/16 17:19, Karol Herbst wrote: >>> currently there is no change, because nobody uses those macros yet, but >>> they >>> shouldn't stay broken >>> >>> Signed-off-by: Karol Herbst <nouveau at