search for: entry_nr

...ource_flags(dev, bar); + if (flags & (IORESOURCE_DISABLED | IORESOURCE_UNSET | IORESOURCE_BUSY)) + return 0; + + return pci_resource_start(dev, bar); +} + /* * Protected by msi_lock */ static int msi_map_pirq_to_vector(struct pci_dev *dev, int pirq, - int entry_nr, int msi) + int entry_nr, u64 table_base) { struct physdev_map_pirq map_irq; int rc; @@ -254,10 +270,10 @@ map_irq.type = MAP_PIRQ_TYPE_MSI; map_irq.index = -1; map_irq.pirq = pirq; - map_irq.msi_info.bus = dev->bus->number; - map_irq.msi_info.devfn = dev->devfn; - ma...

..." only dword access is allowed\n", addr); } static void pci_msix_writel(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -441,13 +441,11 @@ static void pci_msix_writel(void *opaque struct pt_msix_info *msix = dev->msix; struct msix_entry_info *entry; int entry_nr, offset; - void *phys_off; - uint32_t vec_ctrl; if ( addr % 4 ) { - PT_LOG("Error: Unaligned dword access to MSI-X table, \ - addr %016"PRIx64"\n", addr); + PT_LOG("Error: Unaligned dword write to MSI-X table," +...

..._nr ++; - } - if (entries_nr == 0) { - fprintf(stderr, "MSI-X entry number is zero!\n"); - return -EINVAL; - } msix_nr.assigned_dev_id = calc_assigned_dev_id(adev->h_busnr, (uint8_t)adev->h_devfn); - msix_nr.entry_nr = entries_nr; + msix_nr.entry_nr = 0; + for (i = 0; i < pci_dev->msix_irq_entries_nr; ++i) + if (msix_vector_is_used(pci_dev, i)) + ++msix_nr.entry_nr; + r = kvm_assign_set_msix_nr(kvm_context, &msix_nr); if (r != 0) { fprintf(stderr, "fail...

..._nr ++; - } - if (entries_nr == 0) { - fprintf(stderr, "MSI-X entry number is zero!\n"); - return -EINVAL; - } msix_nr.assigned_dev_id = calc_assigned_dev_id(adev->h_busnr, (uint8_t)adev->h_devfn); - msix_nr.entry_nr = entries_nr; + msix_nr.entry_nr = 0; + for (i = 0; i < pci_dev->msix_irq_entries_nr; ++i) + if (msix_vector_is_used(pci_dev, i)) + ++msix_nr.entry_nr; + r = kvm_assign_set_msix_nr(kvm_context, &msix_nr); if (r != 0) { fprintf(stderr, "fail...

..._nr ++; - } - if (entries_nr == 0) { - fprintf(stderr, "MSI-X entry number is zero!\n"); - return -EINVAL; - } msix_nr.assigned_dev_id = calc_assigned_dev_id(adev->h_busnr, (uint8_t)adev->h_devfn); - msix_nr.entry_nr = entries_nr; + msix_nr.entry_nr = 0; + for (i = 0; i < pci_dev->msix_irq_entries_nr; ++i) + if (msix_vector_is_used(pci_dev, i)) + ++msix_nr.entry_nr; + r = kvm_assign_set_msix_nr(kvm_context, &msix_nr); if (r != 0) { fprintf(stderr, "fail...

..._nr ++; - } - if (entries_nr == 0) { - fprintf(stderr, "MSI-X entry number is zero!\n"); - return -EINVAL; - } msix_nr.assigned_dev_id = calc_assigned_dev_id(adev->h_busnr, (uint8_t)adev->h_devfn); - msix_nr.entry_nr = entries_nr; + msix_nr.entry_nr = 0; + for (i = 0; i < pci_dev->msix_irq_entries_nr; ++i) + if (msix_vector_is_used(pci_dev, i)) + ++msix_nr.entry_nr; + r = kvm_assign_set_msix_nr(kvm_context, &msix_nr); if (r != 0) { fprintf(stderr, "fail...

...= (msg_ctr&PCI_MSI_FLAGS_QSIZE) >> 4; if (msgvec == 0) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 5a40516..e67acd1 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -595,7 +595,6 @@ static struct msi_desc *msi_setup_entry(struct pci_dev *dev) entry->msi_attrib.entry_nr = 0; entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT); entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ - entry->msi_attrib.pos = dev->msi_cap; entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1; if (control &a...

Hi maintainer, Reprodue an bug on xen-unstable, it''s an irq affinity issue for passthroughed msix device to uek1 pvhvm(2.6.32 stable). I passthrough two mptsas devices(0000:0d:0.0, 0000:1f:0.0) to a pvhvm, irq affinity can''t be changed. Step to reproduce is as below: 1. xl -f pci-assignable-add 0000:0d:0.0; xl -f pci-assignable-add 0000:1f:0.0 2.xm cr -c vm.cfg

...xc_domain.c b/tools/libxc/xc_domain.c index bb71cca..f6fc8e4 100644 --- a/tools/libxc/xc_domain.c +++ b/tools/libxc/xc_domain.c @@ -1339,7 +1339,9 @@ int xc_domain_update_msi_irq( uint32_t gvec, uint32_t pirq, uint32_t gflags, - uint64_t gtable) + uint64_t gtable, + uint16_t entry_nr, + uint32_t msi_ad[3]) { int rc; xen_domctl_bind_pt_irq_t *bind; @@ -1356,6 +1358,9 @@ int xc_domain_update_msi_irq( bind->u.msi.gvec = gvec; bind->u.msi.gflags = gflags; bind->u.msi.gtable = gtable; + bind->u.msi.entry_nr = entry_nr; + if ( gtable ) +...

...uct msi_msg *msg) > { > if (entry->dev->current_state != PCI_D0) { > /* Don't touch the hardware now */ > } else if (entry->msi_attrib.is_msix) { > void __iomem *base; > base = entry->mask_base + > entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; > > writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR); > writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR); > writel(msg->data, base + PCI_MSIX_ENTRY_DATA); > ...... > >> shouldn't. I don't k...

...six_enabled = 0; > +} > + > +static struct msi_desc * msi_setup_entry(struct msi_irqs *msi) > +{ > + struct msi_desc *entry; > + > + entry = alloc_msi_entry(msi); > + if (!entry) > + return NULL; > + > + entry->msi_attrib.is_msix = 0; > + entry->msi_attrib.entry_nr = 0; > + > + if (!msi->ops || !msi->ops->msi_setup_entry) { > + kfree(entry); > + return NULL; > + } Can we move this check at the start of the function? > + > + msi->ops->msi_setup_entry(msi, entry); > + return entry; > +} > + > +static int msix_...

...six_enabled = 0; > +} > + > +static struct msi_desc * msi_setup_entry(struct msi_irqs *msi) > +{ > + struct msi_desc *entry; > + > + entry = alloc_msi_entry(msi); > + if (!entry) > + return NULL; > + > + entry->msi_attrib.is_msix = 0; > + entry->msi_attrib.entry_nr = 0; > + > + if (!msi->ops || !msi->ops->msi_setup_entry) { > + kfree(entry); > + return NULL; > + } Can we move this check at the start of the function? > + > + msi->ops->msi_setup_entry(msi, entry); > + return entry; > +} > + > +static int msix_...

Hi developers, I met some domU issues and the log suggests missing interrupt. Details from here: http://www.gossamer-threads.com/lists/xen/users/263938#263938 In summary, this is the suspicious log: (XEN) vmsi.c:122:d32767 Unsupported delivery mode 3 I''ve checked the code in question and found that mode 3 is an ''reserved_1'' mode. I want to trace down the source of this

...ble(msi, 0, MSIX_TYPE); + msi_set_intx(msi, 1); + msi->msix_enabled = 0; +} + +static struct msi_desc * msi_setup_entry(struct msi_irqs *msi) +{ + struct msi_desc *entry; + + entry = alloc_msi_entry(msi); + if (!entry) + return NULL; + + entry->msi_attrib.is_msix = 0; + entry->msi_attrib.entry_nr = 0; + + if (!msi->ops || !msi->ops->msi_setup_entry) { + kfree(entry); + return NULL; + } + + msi->ops->msi_setup_entry(msi, entry); + return entry; +} + +static int msix_setup_entries(struct msi_irqs *msi, void __iomem *base, + struct msix_entry *entries, int nvec) +{ + s...

...for the following mapping request to Xen. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> diff --git a/hw/pt-msi.c b/hw/pt-msi.c index f0fb3e3..b01744e 100644 --- a/hw/pt-msi.c +++ b/hw/pt-msi.c @@ -300,6 +300,14 @@ static int pt_msix_update_one(struct pt_dev *dev, int entry_nr) if ( !entry->flags ) return 0; + if (!gvec) { + /* if gvec is 0, the guest is asking for a particular pirq that + * is passed as dest_id */ + pirq = ((gaddr >> 32) & 0xffffff00) | + (((gaddr & 0xffffffff) >> MSI_TARGET_C...

...ck, but the passing of a machine address from Dom0 to Xen implies that Dom0 knows what it does, and Xen trusts it. Specifically, struct physdev_map_pirq has this contents according to the trace .domid = 00007ff0 .type = 00000000 .index = ffffffff .pirq = ffffffff .bus = 00000000 .devfn = 00000008 .entry_nr = 00000000 .table_base = f5861e4a00000001 table_base would seem like not having been initialized at all. I would guess that they use the structure definition from before c/s 18323 (which had, instead of a table_base member, an int field indicating MSI vs. MSI-X. The original definition was added w...

...>> if (entry->dev->current_state != PCI_D0) { >> /* Don't touch the hardware now */ >> } else if (entry->msi_attrib.is_msix) { >> void __iomem *base; >> base = entry->mask_base + >> entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; >> >> writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR); >> writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR); >> writel(msg->data, base + PCI_MSIX_ENTRY_DATA); >> ...... >> >>>...

Hi all, The series is a draft of generic MSI driver that supports PCI and Non-PCI device which have MSI capability. If you're not interested it, sorry for the noise. The series is based on Linux-3.16-rc1. MSI was introduced in PCI Spec 2.2. Currently, kernel MSI driver codes are bonding with PCI device. Because MSI has a lot advantages in design. More and more non-PCI devices want to use

Hi all, The series is a draft of generic MSI driver that supports PCI and Non-PCI device which have MSI capability. If you're not interested it, sorry for the noise. The series is based on Linux-3.16-rc1. MSI was introduced in PCI Spec 2.2. Currently, kernel MSI driver codes are bonding with PCI device. Because MSI has a lot advantages in design. More and more non-PCI devices want to use

...uct msi_desc { - struct { + struct msi_attrib { __u8 type : 5; /* {0: unused, 5h:MSI, 11h:MSI-X} */ __u8 maskbit : 1; /* mask-pending bit supported ? */ __u8 masked : 1; __u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */ __u8 pos; /* Location of the msi capability */ __u16 entry_nr; /* specific enabled entry */ - }msi_attrib; + } msi_attrib; struct list_head list; @@ -122,8 +121,6 @@ int msi_free_irq(struct msi_desc *entry) */ #define NR_HP_RESERVED_VECTORS 20 -extern const struct hw_interrupt_type pci_msi_type; - #define PCI_MSIX_ENTRY_SIZE 16 #define...