search for: enop

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2009 Jan 20
1
[LLVMdev] HazardRecognizer and RegisterAllocation
...uler. In fact, we were thinking about writing a machine pass of our own. One thing that does "disturb" me is that both HazardRecognizer and post-RA sched assume there's only one kind of NOP. For Cell, there are two, depending upon the pipeline being filled. Pipe 0 takes "ENOP" whereas Pipe 1 take "LNOP" (depends on the low order PC bits.) -scooter On Jan 19, 2009, at 2:42 PM, Dan Gohman wrote: > > On Jan 19, 2009, at 11:01 AM, Patrick Boettcher wrote: >> >> >>>> And more generally: Is the hazardRecognizer the right and on...
2009 Jan 19
0
[LLVMdev] HazardRecognizer and RegisterAllocation
On Jan 19, 2009, at 11:01 AM, Patrick Boettcher wrote: > > >>> And more generally: Is the hazardRecognizer the right and only way >>> to >>> solve our NOOP-minimizing problem? >> >> Perhaps you want to do this after register allocation is done. Dan is >> developing the post-allocation scheduler. You can try it out. > > Interesting. Can it
2009 Jan 19
3
[LLVMdev] HazardRecognizer and RegisterAllocation
Hi Evan, thanks for your response. On Mon, 19 Jan 2009, Evan Cheng wrote: >> For example, code which looks like that: >> >> load 0x1234, reg1 >> noop >> noop >> add reg1, 1 >> load 0x1236, reg2 >> >> can be safely transformed to: >> >> load 0x1234, reg1 >> load 0x1236, reg2 >> noop >> add reg1, 1 >> >