search for: enforceknownalignment

Displaying 4 results from an estimated 4 matches for "enforceknownalignment".

2012 Nov 10
2
[LLVMdev] [NVPTX] llc -march=nvptx64 -mcpu=sm_20 generates invalid zero align for device function params
...ing between A and B, causing B to not be at the position that such naughty people are expecting. It should work either way, but I do need to audit the codebase and > tie up any issues here. The IR optimizers already bump the alignment of some globals up to the preferred alignment, check out enforceKnownAlignment in Local.cpp (it ends up being called from instcombine). Ciao, Duncan.
2012 Nov 10
0
[LLVMdev] [NVPTX] llc -march=nvptx64 -mcpu=sm_20 generates invalid zero align for device function params
...n > that > such naughty people are expecting. > > > It should work either way, but I do need to audit the codebase and > >> tie up any issues here. >> > > The IR optimizers already bump the alignment of some globals up to the > preferred alignment, check out enforceKnownAlignment in Local.cpp (it ends > up being called from instcombine). > > Ciao, Duncan. > -- Thanks, Justin Holewinski -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20121110/dc2fcbae/attachment.html&gt...
2012 Nov 09
0
[LLVMdev] [NVPTX] llc -march=nvptx64 -mcpu=sm_20 generates invalid zero align for device function params
Test cases exist under test/CodeGen/NVPTX (name changed in May). Now that I'm back at NVIDIA, I'm going to be running through the bugzilla issues (thanks Dmitry for the reports!). I have practically the exact same patch here in my queue. :) In this case, I would prefer ABI alignment for compatibility with the vendor compiler. It should work either way, but I do need to audit the
2012 Nov 09
3
[LLVMdev] [NVPTX] llc -march=nvptx64 -mcpu=sm_20 generates invalid zero align for device function params
Hi Dmitry, > You're right, global variables use preferred alignment. And - yes, > preferred alignment in this case is bigger: 8 instead of 4. NVIDIA's > prop. compiler gives 4. However, since CUDA 5.0 ptx modules are > linkable with each other, I think alignments for externally visible > functions and data should all follow ABI rules. giving it an alignment of 8 does