search for: endsub

...\n" >> UMUL TEMP[0], SV[0], IMM[0] >> LOAD TEMP[1].xy, RINPUT, TEMP[0] >> LOAD TEMP[0].x, RGLOBAL, TEMP[1].yyyy >> UADD TEMP[1].x, TEMP[0], -TEMP[1] >> STORE RGLOBAL.x, TEMP[1].yyyy, TEMP[1] >> RET >> ENDSUB >> >> >> Where by RINPUT and RGLOBAL get replaces by processing the >> code with cpp and the following defines: >> >> #define RGLOBAL RES[32767] >> #define RLOCAL RES[32766] >> #define RPRIVATE RES[32765] >> #define RINPUT...

...MM[0] >>>> LOAD TEMP[1].xy, RINPUT, TEMP[0] >>>> LOAD TEMP[0].x, RGLOBAL, TEMP[1].yyyy >>>> UADD TEMP[1].x, TEMP[0], -TEMP[1] >>>> STORE RGLOBAL.x, TEMP[1].yyyy, TEMP[1] >>>> RET >>>> ENDSUB >>>> >>>> >>>> Where by RINPUT and RGLOBAL get replaces by processing the >>>> code with cpp and the following defines: >>>> >>>> #define RGLOBAL RES[32767] >>>> #define RLOCAL RES[32766] >>>...

...TEMP1y SHLs TEMP1x, TEMP1x, 2 LOADiis TEMP1z, [0] UADDs TEMP1x, TEMP1z, TEMP1x LOADgis TEMP1x, [TEMP1x] INEGs TEMP1x, TEMP1x LOADgis TEMP1z, [TEMP1y] UADDs TEMP1x, TEMP1x, TEMP1z STOREgis [TEMP1y], TEMP1x RET ENDSUB Working tgsi for this would look like this: COMP DCL SV[0], THREAD_ID[0] DCL TEMP[0], LOCAL DCL TEMP[1], LOCAL IMM UINT32 { 0, 0, 0, 0 } IMM UINT32 { 4, 0, 0, 0 } IMM UINT32 { 128, 0, 0, 0 } BGNSUB LOAD TEMP[0].xy, RINPUT, IMM[0] UMUL TEMP[1].x, SV[0], IMM[1] UADD TEMP[0]...

...LOCAL DCL TEMP[1], LOCAL IMM UINT32 { 8, 0, 0, 0 } BGNSUB\n" UMUL TEMP[0], SV[0], IMM[0] LOAD TEMP[1].xy, RINPUT, TEMP[0] LOAD TEMP[0].x, RGLOBAL, TEMP[1].yyyy UADD TEMP[1].x, TEMP[0], -TEMP[1] STORE RGLOBAL.x, TEMP[1].yyyy, TEMP[1] RET ENDSUB Where by RINPUT and RGLOBAL get replaces by processing the code with cpp and the following defines: #define RGLOBAL RES[32767] #define RLOCAL RES[32766] #define RPRIVATE RES[32765] #define RINPUT RES[32764] If I understand how memory is supposed to work, then I woul...

...t; LOAD TEMP[1].xy, RINPUT, TEMP[0] >>>>> LOAD TEMP[0].x, RGLOBAL, TEMP[1].yyyy >>>>> UADD TEMP[1].x, TEMP[0], -TEMP[1] >>>>> STORE RGLOBAL.x, TEMP[1].yyyy, TEMP[1] >>>>> RET >>>>> ENDSUB >>>>> >>>>> >>>>> Where by RINPUT and RGLOBAL get replaces by processing the >>>>> code with cpp and the following defines: >>>>> >>>>> #define RGLOBAL RES[32767] >>>>> #define RLOCAL...

...t; LOAD TEMP[1].xy, RINPUT, TEMP[0] >>>>> LOAD TEMP[0].x, RGLOBAL, TEMP[1].yyyy >>>>> UADD TEMP[1].x, TEMP[0], -TEMP[1] >>>>> STORE RGLOBAL.x, TEMP[1].yyyy, TEMP[1] >>>>> RET >>>>> ENDSUB >>>>> >>>>> >>>>> Where by RINPUT and RGLOBAL get replaces by processing the >>>>> code with cpp and the following defines: >>>>> >>>>> #define RGLOBAL RES[32767] >>>>> #define RLOCAL...

...UMUL TEMP[0], SV[0], IMM[0] >>> LOAD TEMP[1].xy, RINPUT, TEMP[0] >>> LOAD TEMP[0].x, RGLOBAL, TEMP[1].yyyy >>> UADD TEMP[1].x, TEMP[0], -TEMP[1] >>> STORE RGLOBAL.x, TEMP[1].yyyy, TEMP[1] >>> RET >>> ENDSUB >>> >>> >>> Where by RINPUT and RGLOBAL get replaces by processing the >>> code with cpp and the following defines: >>> >>> #define RGLOBAL RES[32767] >>> #define RLOCAL RES[32766] >>> #define RPRIVATE RES[...

...SHOWDISPLAY "missedcall" AT 2 CLEAR SHOWDISPLAY "titles" AT 1 SHOWKEYS "vmail_OH" ENDIF IFEVENT TIMER THEN CLEAR SHOWDISPLAY "empty" AT 4 ENDIF ENDSUB SUB "offHook" IS IFEVENT FARRING THEN CLEAR SHOWDISPLAY "titles" AT 1 NOUPDATE SHOWDISPLAY "ringing" AT 2 NOUPDATE SHOWDISPLAY "callname" at 3 NOUPDATE SHOWDISPLAY &quot...

...;> UADDs TEMP1x, TEMP1z, TEMP1x >> LOADgis TEMP1x, [TEMP1x] >> INEGs TEMP1x, TEMP1x >> LOADgis TEMP1z, [TEMP1y] >> UADDs TEMP1x, TEMP1x, TEMP1z >> STOREgis [TEMP1y], TEMP1x >> RET >> ENDSUB >> >> Working tgsi for this would look like this: >> >> COMP >> DCL SV[0], THREAD_ID[0] >> DCL TEMP[0], LOCAL >> DCL TEMP[1], LOCAL >> IMM UINT32 { 0, 0, 0, 0 } >> IMM UINT32 { 4, 0, 0, 0 } >> IMM UINT32 { 128, 0, 0, 0 } >> >>...

..., 2 > LOADiis TEMP1z, [0] > UADDs TEMP1x, TEMP1z, TEMP1x > LOADgis TEMP1x, [TEMP1x] > INEGs TEMP1x, TEMP1x > LOADgis TEMP1z, [TEMP1y] > UADDs TEMP1x, TEMP1x, TEMP1z > STOREgis [TEMP1y], TEMP1x > RET > ENDSUB > > Working tgsi for this would look like this: > > COMP > DCL SV[0], THREAD_ID[0] > DCL TEMP[0], LOCAL > DCL TEMP[1], LOCAL > IMM UINT32 { 0, 0, 0, 0 } > IMM UINT32 { 4, 0, 0, 0 } > IMM UINT32 { 128, 0, 0, 0 } > > BGNSUB > LOAD TEMP[0].xy, RINPUT, IMM[...

..., 2 > LOADiis TEMP1z, [0] > UADDs TEMP1x, TEMP1z, TEMP1x > LOADgis TEMP1x, [TEMP1x] > INEGs TEMP1x, TEMP1x > LOADgis TEMP1z, [TEMP1y] > UADDs TEMP1x, TEMP1x, TEMP1z > STOREgis [TEMP1y], TEMP1x > RET > ENDSUB > > Working tgsi for this would look like this: > > COMP > DCL SV[0], THREAD_ID[0] > DCL TEMP[0], LOCAL > DCL TEMP[1], LOCAL > IMM UINT32 { 0, 0, 0, 0 } > IMM UINT32 { 4, 0, 0, 0 } > IMM UINT32 { 128, 0, 0, 0 } > > BGNSUB > LOAD TEMP[0].xy, RINPUT, I...

...t/CodeGen/AMDGPU/add.ll -o - # BB#0: UADDs TEMP0x, TEMP0x, 0 LOADgis TEMP1z, [TEMP1y] UADDs TEMP1y, TEMP1y, 4 LOADgis TEMP1y, [TEMP1y] UADDs TEMP1y, TEMP1z, TEMP1y STOREgis [TEMP1x], TEMP1y UADDs TEMP0x, TEMP0x, 0 RET ENDSUB and add.ll has: ;FUNC-LABEL: {{^}}test1: ;EG: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ;SI: v_add_i32_e32 [[REG:v[0-9]+]], vcc, {{v[0-9]+, v[0-9]+}} ;SI-NOT: [[REG]] ;SI: buffer_store_dword [[REG]], define void @test1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {...

...0, 0 } > > BGNSUB\n" > UMUL TEMP[0], SV[0], IMM[0] > LOAD TEMP[1].xy, RINPUT, TEMP[0] > LOAD TEMP[0].x, RGLOBAL, TEMP[1].yyyy > UADD TEMP[1].x, TEMP[0], -TEMP[1] > STORE RGLOBAL.x, TEMP[1].yyyy, TEMP[1] > RET > ENDSUB > > > Where by RINPUT and RGLOBAL get replaces by processing the > code with cpp and the following defines: > > #define RGLOBAL RES[32767] > #define RLOCAL RES[32766] > #define RPRIVATE RES[32765] > #define RINPUT RES[32764] > > If I und...

...RGLOBAL.xyzw, TEMP[0], SV[2]\n" " UADD TEMP[0].x, TEMP[0], IMM[1]\n" - " STORE RES[0].xyzw, TEMP[0], SV[3]\n" + " STORE RGLOBAL.xyzw, TEMP[0], SV[3]\n" " RET\n" "ENDSUB\n"; void init(void *p, int s, int x, int y) { @@ -485,16 +486,18 @@ static void test_system_values(struct context *ctx) break; } } + uint32_t input; printf("- %s\n", __func__); - init_prog(ctx,...

...L TEMP[1], LOCAL IMM[0] UINT32 {8, 0, 0, 0} 0: BGNSUB :0 1: UMUL TEMP[0], SV[0], IMM[0] 2: LOAD TEMP[1].xy, RES[32764], TEMP[0] 3: LOAD TEMP[0].x, RES[32767], TEMP[1].yyyy 4: UADD TEMP[1].x, TEMP[0], -TEMP[1] 5: STORE RES[32767].x, TEMP[1].yyyy, TEMP[1] 6: RET 7: ENDSUB Which translates to: SUB:0 () BB:0 (7 instructions) - df = { } -> BB:1 (cross) 0: rdsv u32 $r0 sv[TID:0] (8) 1: shl u32 $r2 $r0 0x00000003 (8) 2: ld u64 $r0d c0[$r2+0x0] (8) 3: ld u32 $r2 g[$r1+0x0] (8) 4: add u32 $r0 $r2 neg $r0 (8) 5: st u32 # g[$r1+0x0] $r0 (8) 6: ret...

I believe that your problem is this: /*01a0*/ LD R8, [R8]; /* 0x8000000000821c85 */ That needs to be LD.E (and your ST's need to be ST.E). You're using a 32-bit gmem address, but you need to be using a 64-bit one. I believe the 32-bit ones work on fermi, but afaik not on Kepler. Cheers, -ilia On Wed, Dec 16, 2015 at 12:06 PM, Hans de Goede

Hi, On 18-02-16 17:39, Ilia Mirkin wrote: > On Thu, Feb 18, 2016 at 9:45 AM, Hans de Goede <hdegoede at redhat.com> wrote: >> But this does not seem to be hooked up yet for nouveau. > > Samuel has patches. See > https://cgit.freedesktop.org/~hakzsam/mesa/log/?h=arb_compute_shader_v3 Cool, I will take a look at those. >> So some questions: >> -The commit by

Hi All, So as discussed I've started working on a TGSI backend for llvm to use as a way to get compute going on nouveau (and other gpu-s). I'm still learning all the ins and outs of llvm so I do not have much to show yet. I've rebased Francisco's (curro's) latest version on top of llvm trunk, and added a commit on top to actual get it build with the latest trunk. So