Displaying 8 results from an estimated 8 matches for "emitstackconvert".
2008 Jul 07
5
[LLVMdev] fp_round libcall
...mit FP_ROUND f64 -> f32 considering a mips target that
only supports single
float point operations. The problem is that f32 is considered legal on this
target but f64 doesn't and the only way I can codegen this instruction is using
setConvertAction(MVT::f64, MVT::f32, Expand), which issues a EmitStackConvert.
What if I want a libcall instead? What should I do? The libcall FROUND_F64_F32
is there, but it seems that it cannot be reached without hacking. What
should I do
to support this? Am I missing something?
Thanks,
--
Bruno Cardoso Lopes
http://www.brunocardoso.cc
"When faced with untenable al...
2008 Jul 07
0
[LLVMdev] fp_round libcall
...t; f32 considering a mips target that
> only supports single
> float point operations. The problem is that f32 is considered legal on this
> target but f64 doesn't and the only way I can codegen this instruction is using
> setConvertAction(MVT::f64, MVT::f32, Expand), which issues a EmitStackConvert.
> What if I want a libcall instead? What should I do? The libcall FROUND_F64_F32
> is there, but it seems that it cannot be reached without hacking. What
> should I do
> to support this? Am I missing something?
with the new LegalizeTypes infrastructure you could add a method to
DAGTyp...
2008 Jul 07
0
[LLVMdev] fp_round libcall
...t; f32 considering a mips target that
> only supports single
> float point operations. The problem is that f32 is considered legal on this
> target but f64 doesn't and the only way I can codegen this instruction is using
> setConvertAction(MVT::f64, MVT::f32, Expand), which issues a EmitStackConvert.
> What if I want a libcall instead? What should I do? The libcall FROUND_F64_F32
> is there, but it seems that it cannot be reached without hacking. What
> should I do
> to support this? Am I missing something?
Is it possible to handle this with a custom expander?
-Chris
--
http://...
2011 May 07
0
[LLVMdev] Question about linking llvm-mc when porting a new backend
...nction&)in libLLVMSelectionDAG.a(FunctionLoweringInfo.cpp.o)
llvm::ComputeMaskedBits(llvm::Value*, llvm::APInt const&,
llvm::APInt&, llvm::APInt&, llvm::TargetData const*, unsigned int)in
libLLVMAnalysis.a(ValueTracking.cpp.o)
(anonymous
namespace)::SelectionDAGLegalize::EmitStackConvert(llvm::SDValue, llvm::EVT,
llvm::EVT, llvm::DebugLoc)
in
libLLVMSelectionDAG.a(LegalizeDAG.cpp.o)
(anonymous
namespace)::SelectionDAGLegalize::EmitStackConvert(llvm::SDValue, llvm::EVT,
llvm::EVT, llvm::DebugLoc)...
2011 May 06
0
[LLVMdev] Question about linking llvm-mc when porting a new backend
...nction&)in libLLVMSelectionDAG.a(FunctionLoweringInfo.cpp.o)
llvm::ComputeMaskedBits(llvm::Value*, llvm::APInt const&,
llvm::APInt&, llvm::APInt&, llvm::TargetData const*, unsigned int)in
libLLVMAnalysis.a(ValueTracking.cpp.o)
(anonymous
namespace)::SelectionDAGLegalize::EmitStackConvert(llvm::SDValue, llvm::EVT,
llvm::EVT, llvm::DebugLoc)
in
libLLVMSelectionDAG.a(LegalizeDAG.cpp.o)
(anonymous
namespace)::SelectionDAGLegalize::EmitStackConvert(llvm::SDValue, llvm::EVT,
llvm::EVT, llvm::DebugLoc)...
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
> Can you explain why you chose the approach of using a new pass?
> I pictured removing LegalizeDAG's type legalization code would
> mostly consist of finding all the places that use TLI.getTypeAction
> and just deleting code for handling its Expand and Promote. Are you
> anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote:
> On Wed, May 20, 2009 at 1:19 PM, Eli Friedman
> <eli.friedman at gmail.com> wrote:
>
>> Per subject, this patch adding an additional pass to handle vector
>>
>> operations; the idea is that this allows removing the code from
>>
>> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...;
+ RHS = LegalizeOp(RHS);
LegalizeSetCCCondCode(VT, LHS, RHS, CC, dl);
}
SDValue ExpandLibCall(RTLIB::Libcall LC, SDNode *Node, bool isSigned,
SDValue &Hi);
- SDValue ExpandIntToFP(bool isSigned, MVT DestTy, SDValue Source, DebugLoc dl);
SDValue EmitStackConvert(SDValue SrcOp, MVT SlotVT, MVT DestVT, DebugLoc dl);
SDValue ExpandBUILD_VECTOR(SDNode *Node);
@@ -306,12 +165,7 @@
SDValue ExpandBSWAP(SDValue Op, DebugLoc dl);
SDValue ExpandBitCount(unsigned Opc, SDValue Op, DebugLoc dl);
- bool ExpandShift(unsigned Opc, SDValue Op, SDValue Amt,
-...