search for: emitresultcode

Displaying 5 results from an estimated 5 matches for "emitresultcode".

2016 Jan 18
2
Using `smullohi` in TableGen patterns
...ivrem, and sdivrem. There are no examples of these in TableGen in tree. The closest I can get is this: set (R1, R0, (umullohi GPR8:$lhs, GPR8:$rhs)) Which fails: Assertion failed: (Ops.size() >= NumSrcResults && "Didn't provide enough results"), function EmitResultCode, file /Users/dylanmckay/projects/llvm/avr-llvm/utils/TableGen/DAGISelMatcherGen.cpp, line 989. 0 libLLVMSupport.dylib 0x0000000108e8c47e llvm::sys::PrintStackTrace(llvm::raw_ostream&) + 46 1 libLLVMSupport.dylib 0x0000000108e8c8c9 PrintStackTraceSignalHandler(void*) + 25 2 libLLVM...
2008 Oct 20
2
[LLVMdev] TableGen Hacking Help
...src2), SHUFP_shuffle_mask:$sm)>, Requires<[HasSSE2]>; } // AddedComplexity I believe the problem with the tblgen in trunk is that it doesn't know how to support patterns with two memory operands. I've attached the code that the hacked tblgen spits out from EmitResultCode for this pattern. The remaining problem is that this code doesn't actually replace the two memory operations. It generates two MOVSDs and a SHUFPD just fine but it produces two extra MOVSD instructions. As far as I can understand things, the problem is that the two MOVSD instructions are...
2018 Jul 10
2
Stuck with instruction in tablegen
...table generator: Assertion failed: Ops.size() >= NumSrcResults && "Didn't provide enough results" I tried to fix the problem by searched in the documentation and in other table sources, but to no avail. Even stepping through that code in the debugger (MatcherGen::EmitResultCode()) didn't help me to find the cause of the problem. The instruction tables description are quite unique in all the officially supported CPU models, I couldn't find any similar code that could help me figuring out what is going wrong. So I isolated the table sources to a minimum of two s...
2018 Jul 10
2
Stuck with instruction in tablegen
2008 Nov 03
3
[LLVMdev] Multi-instruction patterns, tablegen and chains
...s didn't help at all. In fact, it seems that the value of hasCtrlDep is totally ignored by tblgen. It gets assigned to an instance variable at utils/TableGen/CodeGenInstruction.cpp:98, but that variable doesn't seem to be used anywhere. Some further investigation of the code turns out that EmitResultCode in utils/TableGen/DAGISelEmitter.cpp tries to find out if an output node requires chain operands, but gets it wrong. Around line 913, it does the following: Try to find the pattern belonging to the current Instruction. This is the first pattern listed in the Instruction definition, which does not...