Displaying 3 results from an estimated 3 matches for "emitregunitpressur".
Did you mean:
emitregunitpressure
2019 Mar 25
2
Overlapping register groups in old 8-bit MC6809 processor.
..."too heavy" part. Could one of you kind folks clue me in please? Without the above ALLREG group, the code compiles and while not complete or altogether correct, is testable and somewhat functional.
Assertion failed: (RU.Weight < 256 && "RegUnit too heavy"), function EmitRegUnitPressure, file /usr/local/src/llvm/llvm/utils/TableGen/RegisterInfoEmitter.cpp, line 237.
0 llvm-tblgen 0x000000010bc2b66c llvm::sys::PrintStackTrace(llvm::raw_ostream&) + 60
1 llvm-tblgen 0x000000010bc2bc09 PrintStackTraceSignalHandler(void*) + 25
2 llvm-tblgen...
2012 Dec 06
0
[LLVMdev] Register classes, reg unit weights calculation in tablegen
Hi,
I have a problem with the assert in Tablegen:
llvm-tblgen: /dev/shm/uabpath/dev-master/utils/TableGen/RegisterInfoEmitter.cpp:204: void <anonymous namespace>::RegisterInfoEmitter::EmitRegUnitPressure(llvm::raw_ostream &, const llvm::CodeGenRegBank &, const std::string &): Assertion `RU.Weight < 256 && "RegUnit too heavy"' failed.
The reason for this is that I have constructed pred-operands to be of the register class type FlagRegs, which holds a big union...
2012 Dec 11
0
[LLVMdev] FW: Register classes, reg unit weights calculation in tablegen
...012 4:14 PM
To: llvmdev at cs.uiuc.edu
Subject: Register classes, reg unit weights calculation in tablegen
Hi,
I have a problem with the assert in Tablegen:
llvm-tblgen: /dev/shm/uabpath/dev-master/utils/TableGen/RegisterInfoEmitter.cpp:204: void <anonymous namespace>::RegisterInfoEmitter::EmitRegUnitPressure(llvm::raw_ostream &, const llvm::CodeGenRegBank &, const std::string &): Assertion `RU.Weight < 256 && "RegUnit too heavy"' failed.
The reason for this is that I have constructed pred-operands to be of the register class type FlagRegs, which holds a big union...