search for: emitpseudoinstruction

...ExecutionEngine/2003-01-04-ArgumentBug.ll' FAILED ******************** Script: -- /nfs_home/chenwj/test/native-build/arm2/Debug+Asserts/bin/lli /nfs_home/chenwj/test/llvm/test/ExecutionEngine/2003-01-04-ArgumentBug.ll > /dev/null -- Exit Code: 134 Command Output (stderr): -- ARMCodeEmitter::emitPseudoInstruction UNREACHABLE executed at /nfs_home/chenwj/test/llvm/lib/Target/ARM/ARMCodeEmitter.cpp:831! 0 libc.so.6 0x402e5000 Stack dump: 0. Program arguments: /nfs_home/chenwj/test/native-build/arm2/Debug+Asserts/bin/lli /nfs_home/chenwj/test/llvm/test/ExecutionEngine/2003-01-04-ArgumentBug.ll 1. Running pas...

...y MCJIT bug on LLVM 3.2. The same code works beautifully on x86 desktop with the same version of LLVM. This is the error I've been getting on ARM platforms: dsheffie at tegra-ubuntu:~/projects/threeFingeredJack/python_compile$ python ./vvadd.py [ 0. 0. 0. ..., 0. 0. 0.] ARMCodeEmitter::emitPseudoInstruction UNREACHABLE executed at /home/dsheffie/llvm/llvm-3.2.src/lib/Target/ARM/ARMCodeEmitter.cpp:843! Stack dump: 0. Running pass 'ARM Machine Code Emitter' on function '@tramp_4002416' Aborted I'm running on Ubuntu 12.04 (hard float) on a quad-core nvidia Tegra3 (4x cortex-a...

...Value |= " + PostEmitter + "(MI, Value);\n"; This looks like it would affect all targets, except apparently only ARM uses this feature. 2) ARM BR_JTm and BR_JTadd do not emit because they were changed to PseudoInstructions but the ARMCodeEmitter wasn't updated to compensate. emitPseudoInstruction() asserts (llvm_unreachable). 3) FCONSTS/FCONSTD also assert similarly. emitMiscInstruciton which used to support these instructions was removed in r116644. If you try to add back a case for them in the obvious way, getBinaryCodeForInstr() (which now ostensibly should handle this and has a case...

..., it's because the hook itself has a bug. > This looks like it would affect all targets, except apparently only ARM uses this feature. > > 2) ARM BR_JTm and BR_JTadd do not emit because they were changed to PseudoInstructions but the ARMCodeEmitter wasn't updated to compensate. emitPseudoInstruction() asserts (llvm_unreachable). This is another symptom of the non-MC ARM JIT being unmaintained. It is correct for emitPseudoInstruction() to assert. All pseudo instructions should be expanded before they reach the encoder, and they are properly expanded in the MC-based path. --Owen

...igned Val) const { return Val; } >> This looks like it would affect all targets, except apparently only ARM uses this feature. >> >> 2) ARM BR_JTm and BR_JTadd do not emit because they were changed to PseudoInstructions but the ARMCodeEmitter wasn't updated to compensate. emitPseudoInstruction() asserts (llvm_unreachable). > > This is another symptom of the non-MC ARM JIT being unmaintained. It is correct for emitPseudoInstruction() to assert. All pseudo instructions should be expanded before they reach the encoder, and they are properly expanded in the MC-based path. But there...

...signed Val) const { return Val; } >> This looks like it would affect all targets, except apparently only ARM uses this feature. >> >> 2) ARM BR_JTm and BR_JTadd do not emit because they were changed to PseudoInstructions but the ARMCodeEmitter wasn't updated to compensate. emitPseudoInstruction() asserts (llvm_unreachable). > > This is another symptom of the non-MC ARM JIT being unmaintained. It is correct for emitPseudoInstruction() to assert. All pseudo instructions should be expanded before they reach the encoder, and they are properly expanded in the MC-based path. But there...

...urn Val; } > > >>> This looks like it would affect all targets, except apparently only ARM uses this feature. >>> >>> 2) ARM BR_JTm and BR_JTadd do not emit because they were changed to PseudoInstructions but the ARMCodeEmitter wasn't updated to compensate. emitPseudoInstruction() asserts (llvm_unreachable). >> >> This is another symptom of the non-MC ARM JIT being unmaintained. It is correct for emitPseudoInstruction() to assert. All pseudo instructions should be expanded before they reach the encoder, and they are properly expanded in the MC-based path. &g...

...initely interested in submitting a patch if you could help me by sending me in the right direction, since I really want this working. I managed to reproduce this behavior in LLVM 3.0 by modifying llc to read my .bc file and try to JIT the code for the mentioned Triple. The error: ARMCodeEmitter::emitPseudoInstruction UNREACHABLE executed at /home/guillermo/llvm-3.0.src/lib/Target/ARM/ARMCodeEmitter.cpp:838! Stack dump: 0. Program arguments: ./bin/llc -mtriple armv7a-unknown-linux-gnueabi -O3 /home/guillermo/Code/SieveAtom_execute.bc 1. Running pass 'ARM Machine Code Emitter' on function '@execute...

Guillermo, > I'm sorry I forgot to mention I am compiling the bitcode using the JIT. The > actual error, I get when I'm trying to get the function to the pointer. I'm > using a custom front end that translates Android's Dalvik bytecode into LLVM > bitcode based on Android ICS's modified LLVM version. ARM JIT is broken in many ways. So, what you're seeing is

Hi, I'm sorry I forgot to mention I am compiling the bitcode using the JIT. The actual error, I get when I'm trying to get the function to the pointer. I'm using a custom front end that translates Android's Dalvik bytecode into LLVM bitcode based on Android ICS's modified LLVM version. Thanks, On Mon, Feb 20, 2012 at 7:55 PM, James Molloy <James.Molloy at arm.com>