search for: emitinstrwithcustominserter

Hi! I have a DAG (attached), which, according to me, should result in the code for coroutine_make be generated _before_ the ret. However, it seems that the corresponding EmitInstrWithCustomInserter is being called /after/ the RET instruction has already been emitted. The LLVM code I'm trying to compile is this (coroutine_make is an intrinsic I've added): declare i32 @llvm.coroutine_size() declare void @llvm.coroutine_make(i64 *, i64 *, i8 *, i32) define i64 * @foo() { %a = call...

...uld only be done if CR bit 6 is set. I've been told that the lack of this check is preventing clang/LLVM from compiling a functional FreeBSD kernel on PPC. Is is possible to insert another branch in LowerFormalArguments? Some of the atomic instructions insert branches, but those are handled in EmitInstrWithCustomInserter. Can branches be inserted inside LowerFormalArguments in the same way? Thanks in advance, Hal -- Hal Finkel Postdoctoral Appointee Leadership Computing Facility Argonne National Laboratory

...dola at gmail.com> > On 08/06/2011 02:40 AM, Sanjoy Das wrote: > > Hi! > > > > I have a DAG (attached), which, according to me, should result in the > > code for coroutine_make be generated _before_ the ret. > > > > However, it seems that the corresponding EmitInstrWithCustomInserter is > > being called /after/ the RET instruction has already been emitted. > > That is strange, from the dump it looks like all the chain edges are there. > > What is the MI dump you get for this BB just after instruction selection? > > > Thanks! > > Cheers, > Raf...

...ample, lh, lhu, sh, and etc. I have tried to directly comment lh, lhu, and sh to make llvm not to choose these instruction when compiling, however, it usually cause a 'can not select ...' error when using 'short' data type in source code. Then I tried to expand these instructions in EmitInstrWithCustomInserter in file lib/Target/Mips/MipsISelLowering.cpp, just as commit in: https://github.com/geraint0923/LLVM-ThuMips/commit/6a9ca907f3e945c2bb1f9627e0e5fdcbd7964da2 It works fine for lh and lhu, and fails for sh: when expanding sh, there are four instruction, but in *.s generated by modified llvm's l...

...AM, Sanjoy Das wrote: >> > Hi! >> > >> > I have a DAG (attached), which, according to me, should result in the >> > code for coroutine_make be generated _before_ the ret. >> > >> > However, it seems that the corresponding EmitInstrWithCustomInserter is >> > being called /after/ the RET instruction has already been emitted. >> >> That is strange, from the dump it looks like all the chain edges are there. >> >> What is the MI dump you get for this BB just after instruction selection? >> >>...

...; > What I really need to kmow is how to insert the branch/label pair at > instruction selection phase. > > Anyone have an example of this? Add a pseudo instruction for the select with usesCustomDAGSchedInsteter = 1. Replace the pseudo instruction with the required control flow in the EmitInstrWithCustomInserter member of your ISelLowering class. There are examples of this in the MIPS or XCore backends. -Richard

On 08/06/2011 02:40 AM, Sanjoy Das wrote: > Hi! > > I have a DAG (attached), which, according to me, should result in the > code for coroutine_make be generated _before_ the ret. > > However, it seems that the corresponding EmitInstrWithCustomInserter is > being called /after/ the RET instruction has already been emitted. That is strange, from the dump it looks like all the chain edges are there. What is the MI dump you get for this BB just after instruction selection? > Thanks! Cheers, Rafael

The current *hack* solution is to mark your pseudo instruction with usesCustomDAGSchedInserter = 1. That allows the targets to expand it at scheduling time by providing a EmitInstrWithCustomInserter() hook. You can create new basic blocks then. Evan On Feb 19, 2008, at 4:51 PM, Andrew Lenharth wrote: > I was working on compare and swap and ran into the following problem. > Several architectures implement this with a load locked, store > conditional sequence. This is good, for th...

On 2/19/08, Evan Cheng <evan.cheng at apple.com> wrote: > The current *hack* solution is to mark your pseudo instruction with > usesCustomDAGSchedInserter = 1. That allows the targets to expand it > at scheduling time by providing a EmitInstrWithCustomInserter() hook. > You can create new basic blocks then. I guess that can work in the short term. It just seems wasteful for each target that uses ldl/stc sequences to have to all implement it. But if that is what we can do right now, I'll give that a shot. Thanks, Andrew

...enson wrote: > Ah, didn't see that, that's what comes of trying to do something at > 5pm :) I attached an updated patch which creates a virtual register > instead of using R0. How does this look? > > Cheers, > Gary > > Dan Gohman wrote: >> PPCTargetLowering::EmitInstrWithCustomInserter has a reference >> to the current MachineFunction for other purposes. Can you use >> MachineFunction::getRegInfo instead? >> >> Dan >> >> On Jul 8, 2008, at 1:56 PM, Gary Benson wrote: >>> Would it be acceptable to change MachineInstr::getRegInfo >&gt...

...s set. I've been told that the lack of this check is > preventing clang/LLVM from compiling a functional FreeBSD kernel on > PPC. > > Is is possible to insert another branch in LowerFormalArguments? Some > of the atomic instructions insert branches, but those are handled in > EmitInstrWithCustomInserter. Can branches be inserted inside > LowerFormalArguments in the same way? > > Thanks in advance, > Hal > -- Hal Finkel Postdoctoral Appointee Leadership Computing Facility Argonne National Laboratory

...d that the lack of this check is >> preventing clang/LLVM from compiling a functional FreeBSD kernel on >> PPC. >> >> Is is possible to insert another branch in LowerFormalArguments? Some >> of the atomic instructions insert branches, but those are handled in >> EmitInstrWithCustomInserter. Can branches be inserted inside >> LowerFormalArguments in the same way? >> >> Thanks in advance, >> Hal >> > > > > -- > Hal Finkel > Postdoctoral Appointee > Leadership Computing Facility > Argonne National Laboratory > ______________...

Hi, I am planning to expanding the pseudo instructions in XXXTargetLowering::EmitInstrWithCustomInserter(), and use temporary virtual registers as operands. If I use virtual registers, do I need to mark them as "early clobber"? I saw that sometimes they marked virtual register as "early clobber" in EmitInstrWithCustomInserter() in MIPS backend. What is the effect of marking a virtu...

Hi All, I need to implement select_cc as a "cmp; mov rX,1; brcond cnd, END; mov rX,0; END:" sequence. Chris mentioned that the PPC code (as well as the x86 SSE code) does this, but I can't seem to find it. What I really need to kmow is how to insert the branch/label pair at instruction selection phase. Anyone have an example of this?

...ndola at gmail.com> > On 08/06/2011 02:40 AM, Sanjoy Das wrote: > > Hi! > > > > I have a DAG (attached), which, according to me, should result in the > > code for coroutine_make be generated _before_ the ret. > > > > However, it seems that the corresponding EmitInstrWithCustomInserter is > > being called /after/ the RET instruction has already been emitted. > > That is strange, from the dump it looks like all the chain edges are there. > > What is the MI dump you get for this BB just after instruction selection? > > > Thanks! > > Cheers, >...

...t; patch. I don't want to post to -commits yet because I have no idea if > this is fully correct, but it seems to work in simple test cases. Am I > on the right track? Yes, your definition of the new instruction looks sane. However, you shouldn't expand the instruction right away in EmitInstrWithCustomInserter(), and leaving the pseudo and call instructions side by side is not going to work. Just leave the pseudo-instruction alone until it hits X86FloatingPoint, where you can rewrite it. > Could this patch ever break in cases where the > operand's vreg doesn't happen to get mapped to ST0?...

...> I have tried to directly comment lh, lhu, and sh to make llvm not to > choose these instruction when compiling, however, it usually cause a > 'can not select ...' error when using 'short' data type in source code. > Then I tried to expand these instructions in > EmitInstrWithCustomInserter in file > lib/Target/Mips/MipsISelLowering.cpp, just as commit in: > > https://github.com/geraint0923/LLVM-ThuMips/commit/6a9ca907f3e945c2bb1f9627e0e5fdcbd7964da2 > > It works fine for lh and lhu, and fails for sh: > when expanding sh, there are four instruction, but in *.s gener...

Would it be acceptable to change MachineInstr::getRegInfo from private to public so I can use it from PPCTargetLowering::EmitInstrWithCustomInserter? Cheers, Gary Evan Cheng wrote: > Look for createVirtualRegister. These are examples in > PPCISelLowering.cpp. > > Evan > On Jul 8, 2008, at 8:24 AM, Gary Benson wrote: > > > Hi Evan, > > > > Evan Cheng wrote: > >> The patch looks great. But I do h...

...requires control flow for early exit. So, instead of implementing the expansion within EmitTargetCodeForMemcmp, a new pseudo instruction is added for memcmp and a SelectionDAG node for this new pseudo is created in EmitTargetCodeForMemcmp. This pseudo instruction is then expanded during lowering in EmitInstrWithCustomInserter. The advantage of this approach is that it uses the existing infrastructure and does not impact other targets. If other targets would like to expand memcmp, they can also override EmitTargetCodeForMemcmp and create their own expansion. Another option to consider is adding a new optimization pass...

...and etc. > I have tried to directly comment lh, lhu, and sh to make llvm not to > choose these instruction when compiling, however, it usually cause a 'can > not select ...' error when using 'short' data type in source code. > Then I tried to expand these instructions in EmitInstrWithCustomInserter > in file lib/Target/Mips/MipsISelLowering.cpp, just as commit in: > > > https://github.com/geraint0923/LLVM-ThuMips/commit/6a9ca907f3e945c2bb1f9627e0e5fdcbd7964da2 > > It works fine for lh and lhu, and fails for sh: > when expanding sh, there are four instruction, but in *.s g...