search for: emitfmad

Displaying 9 results from an estimated 9 matches for "emitfmad".

2015 Feb 20
10
[PATCH 01/11] nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmax
...uction *); void emitFADD(const Instruction *); + void emitDADD(const Instruction *); void emitUMUL(const Instruction *); void emitFMUL(const Instruction *); + void emitDMUL(const Instruction *); void emitIMAD(const Instruction *); void emitISAD(const Instruction *); void emitFMAD(const Instruction *); + void emitDMAD(const Instruction *); void emitMADSP(const Instruction *); void emitNOT(Instruction *); @@ -523,6 +526,25 @@ CodeEmitterNVC0::emitFMAD(const Instruction *i) } void +CodeEmitterNVC0::emitDMAD(const Instruction *i) +{ + bool neg1 = (i->src(0)...
2015 Feb 06
2
[PATCH 1/3] nv50/ir: Add support for MAD 4-byte opcode
...ivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp index 2077388..23e4bab 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp @@ -941,7 +941,10 @@ CodeEmitterNV50::emitFMAD(const Instruction *i) if (i->encSize == 4) { emitForm_MUL(i); - assert(!neg_mul && !neg_add); + code[0] |= neg_mul << 15; + code[0] |= neg_add << 22; + if (i->saturate) + code[0] |= 1 << 8; } else { code[1] = neg_m...
2015 Jan 11
1
[PATCH 1/3] nv50/ir: Add support for MAD short+IMM notation
...v50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp >> index 2077388..b1e7409 100644 >> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp >> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp >> @@ -939,9 +939,20 @@ CodeEmitterNV50::emitFMAD(const Instruction *i) >> >> code[0] = 0xe0000000; >> >> + if (i->src(1).getFile() == FILE_IMMEDIATE) { >> + code[1] = 0; >> + emitForm_IMM(i); >> + code[0] |= neg_mul << 15; >> + code[0] |= neg_add << 22; >...
2015 Jan 11
6
[PATCH 1/3] nv50/ir: Add support for MAD short+IMM notation
...ivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp index 2077388..b1e7409 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp @@ -939,9 +939,20 @@ CodeEmitterNV50::emitFMAD(const Instruction *i) code[0] = 0xe0000000; + if (i->src(1).getFile() == FILE_IMMEDIATE) { + code[1] = 0; + emitForm_IMM(i); + code[0] |= neg_mul << 15; + code[0] |= neg_add << 22; + if (i->saturate) + code[0] |= 1 << 8; + } else...
2015 Feb 23
2
[PATCH 1/2] nv50/ir: add fp64 support on G200 (NVA0)
...@ private: void emitUADD(const Instruction *); void emitAADD(const Instruction *); void emitFADD(const Instruction *); + void emitDADD(const Instruction *); void emitIMUL(const Instruction *); void emitFMUL(const Instruction *); + void emitDMUL(const Instruction *); void emitFMAD(const Instruction *); + void emitDMAD(const Instruction *); void emitIMAD(const Instruction *); void emitISAD(const Instruction *); @@ -923,11 +926,13 @@ CodeEmitterNV50::emitMINMAX(const Instruction *i) assert(0); break; } - code[1] |= i->src(0).mod.a...
2015 Jan 23
3
[PATCH 1/2] nv50/ir: Add support for MAD short+IMM notation
...ivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp index 2077388..b1e7409 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp @@ -939,9 +939,20 @@ CodeEmitterNV50::emitFMAD(const Instruction *i) code[0] = 0xe0000000; + if (i->src(1).getFile() == FILE_IMMEDIATE) { + code[1] = 0; + emitForm_IMM(i); + code[0] |= neg_mul << 15; + code[0] |= neg_add << 22; + if (i->saturate) + code[0] |= 1 << 8; + } else...
2015 Jan 11
0
[PATCH 1/3] nv50/ir: Add support for MAD short+IMM notation
...n/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp > index 2077388..b1e7409 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp > @@ -939,9 +939,20 @@ CodeEmitterNV50::emitFMAD(const Instruction *i) > > code[0] = 0xe0000000; > > + if (i->src(1).getFile() == FILE_IMMEDIATE) { > + code[1] = 0; > + emitForm_IMM(i); > + code[0] |= neg_mul << 15; > + code[0] |= neg_add << 22; > + if (i->saturate) >...
2015 Jan 13
3
nv50/ir: Implement short notation for MAD V2
V2: clarify code, commit msgs, add comments. Drop code to was supposed to make register assignment prefer SDST == SRC2 (patch 2) for now, because it didn't quite do what I intended.
2017 Mar 26
5
[PATCH v5 0/5] nvc0/ir: add support for MAD/FMA PostRALoadPropagation
was "nv50/ir: PostRaConstantFolding improvements" before. nothing really changed from the last version, just minor things. Karol Herbst (5): nv50/ir: restructure and rename postraconstantfolding pass nv50/ir: implement mad post ra folding for nvc0+ gk110/ir: add LIMM form of mad gm107/ir: add LIMM form of mad nv50/ir: also do PostRaLoadPropagation for FMA