Displaying 3 results from an estimated 3 matches for "emit_set".
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emit_pct
2009 Sep 10
0
[PATCH 06/13] nv50: handle SEQ, SGT, SLE, SNE opcodes
...c *pc, struct nv50_reg *dst, struct nv50_reg *src,
emit(pc, e);
}
+/* nv50 Condition codes:
+ * 0x1 = LT
+ * 0x2 = EQ
+ * 0x3 = LE
+ * 0x4 = GT
+ * 0x5 = NE
+ * 0x6 = GE
+ * 0x7 = set condition code ? (used before bra.lt/le/gt/ge)
+ * 0x8 = unordered bit (allows NaN)
+ */
static void
-emit_set(struct nv50_pc *pc, unsigned c_op, struct nv50_reg *dst,
+emit_set(struct nv50_pc *pc, unsigned ccode, struct nv50_reg *dst, int wp,
struct nv50_reg *src0, struct nv50_reg *src1)
{
struct nv50_program_exec *e = exec(pc);
- unsigned inv_cop[8] = { 0, 4, 2, 6, 1, 5, 3, 7 };
struct nv50_reg *r...
2009 Jun 21
0
[PATCH] nv50: support for SLE, SNE, SEQ, SGT
...SI_CC_GT + 8: return 0x3;
+ case TGSI_CC_EQ + 8: return 0xd;
+ case TGSI_CC_LT + 8: return 0x6;
+ case TGSI_CC_GE + 8: return 0x1;
+ case TGSI_CC_LE + 8: return 0x4;
+ case TGSI_CC_NE + 8: return 0x2;
+
+ default:
+ assert(!"invalid condition code");
+ return 0x0;
+ }
+}
+
static void
-emit_set(struct nv50_pc *pc, unsigned c_op, struct nv50_reg *dst,
+emit_set(struct nv50_pc *pc, unsigned c_op, struct nv50_reg *dst, int wp,
struct nv50_reg *src0, struct nv50_reg *src1)
{
struct nv50_program_exec *e = exec(pc);
- unsigned inv_cop[8] = { 0, 4, 2, 6, 1, 5, 3, 7 };
struct nv50_reg *rd...
2009 Jun 21
0
[PATCH] nv50: initial support for IF, ELSE, ENDIF insns
...emp(pc, src);
+ return;
+ }
+
+ if (dst->hw != -1)
+ pc->r_temp[dst->hw] = NULL;
+ pc->r_temp[src->hw] = dst;
+ dst->hw = src->hw;
+
+ FREE(src);
+}
+
static boolean
check_swap_src_0_1(struct nv50_pc *pc,
struct nv50_reg **s0, struct nv50_reg **s1)
@@ -866,6 +885,8 @@ emit_set(struct nv50_pc *pc, unsigned c_op, struct nv50_reg *dst,
set_src_0(pc, dst, e);
emit(pc, e);
+ pc->if_cond = e;
+
if (dst != rdst)
free_temp(pc, dst);
}
@@ -1098,6 +1119,39 @@ emit_tex(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask,
}
static void
+emit_branch(struct nv5...