Displaying 3 results from an estimated 3 matches for "emit_cvt".
2009 Jun 21
0
[PATCH] nv50: support for SLE, SNE, SEQ, SGT
.../* 0x04 == 32 bit */
+/* 0x40 == dst is float */
+/* 0x80 == src is float */
#define CVT_F32_F32 0xc4
#define CVT_F32_S32 0x44
#define CVT_F32_U32 0x64
@@ -819,8 +823,8 @@ emit_precossin(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src)
#define CVT_F32_F32_ROP 0xcc
static void
-emit_cvt(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src,
- int wp, unsigned cop, unsigned fmt)
+emit_cvt(struct nv50_pc *pc, struct nv50_reg *dst, int wp,
+ struct nv50_reg *src, unsigned cvn, unsigned fmt)
{
struct nv50_program_exec *e;
@@ -829,7 +833,7 @@ emit_cvt(struct nv50_pc *pc...
2009 Sep 10
0
[PATCH 06/13] nv50: handle SEQ, SGT, SLE, SNE opcodes
...08
#define CVTOP_ABS 0x10
+/* 0x04 == 32 bit */
+/* 0x40 == dst is float */
+/* 0x80 == src is float */
#define CVT_F32_F32 0xc4
#define CVT_F32_S32 0x44
#define CVT_F32_U32 0x64
@@ -799,7 +802,7 @@ emit_precossin(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src)
static void
emit_cvt(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src,
- int wp, unsigned cop, unsigned fmt)
+ int wp, unsigned cvn, unsigned fmt)
{
struct nv50_program_exec *e;
@@ -808,7 +811,7 @@ emit_cvt(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src,
e->inst[0] |= 0xa0000...
2009 Jun 21
0
[PATCH] nv50: better insn generation
...(rtmp) {
+ if (sat)
+ dst[0] = dst[1] = dst[2] = dst[3] = rtmp;
+ else {
+ for (c = 0; c < 4; c++) {
+ if (mask & (1 << c))
+ emit_mov(pc, dst[c], rtmp);
+ }
+ }
+ }
+
if (sat) {
for (c = 0; c < 4; c++) {
if (!(mask & (1 << c)))
continue;
- emit_cvt(pc, rdst[c], dst[c], -1, CVTOP_SAT,
- CVT_F32_F32);
+ emit_cvt(pc, rdst[c], dst[c], -1, CVTOP_SAT, 0xc4);
}
- } else if (assimilate) {
+ }
+
+ if (assimilate) {
for (c = 0; c < 4; c++)
if (rdst[c])
assimilate_temp(pc, rdst[c], dst[c]);
--
1.6.0.6
--------------09050305010...