Displaying 10 results from an estimated 10 matches for "else4".
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2012 Feb 20
2
[LLVMdev] ARM opcode format
...%54 = getelementptr i8* %53, i32 12
%55 = bitcast i8* %54 to i32*
%56 = load i32* %v4_INTEGER
%57 = getelementptr i32* %55, i32 %56
%58 = load i32* %57
store i32 %58, i32* %v5_INTEGER
%59 = load i32* %v5_INTEGER
%60 = icmp sle i32 %59, 0
br i1 %60, label %merge003e, label %else4
else4: ; preds = %merge0027
%61 = getelementptr i8* %v8, i32 8
%62 = bitcast i8* %61 to i8**
%63 = load i8** %62
store i8* %63, i8** %v5_POINTER
%64 = load i8** %v5_POINTER
%65 = getelementptr i8* %64, i32 12
%66 = bitcast i8* %65 to...
2013 Aug 19
3
[LLVMdev] Issue with X86FrameLowering __chkstk on Windows 8 64-bit / Visual Studio 2012
...tile i32 %8, i32* %res
%9 = load i32* %res
%10 = icmp eq i32 %9, 0
br i1 %10, label %then, label %else
merged: ; preds = %else, %then
%11 = load i32* %res
%12 = and i32 %11, -2147483648
%13 = icmp eq i32 %12, 0
br i1 %13, label %then3, label %else4
then: ; preds = %bb
%zf = alloca i1
%14 = load i1* %zf
%15 = getelementptr i8* %0, i32 148
%16 = bitcast i8* %15 to i1*
%17 = load i1* %16
store volatile i1 true, i1* %16
br label %merged
else: ;...
2012 Feb 20
0
[LLVMdev] ARM opcode format
...%54 = getelementptr i8* %53, i32 12
%55 = bitcast i8* %54 to i32*
%56 = load i32* %v4_INTEGER
%57 = getelementptr i32* %55, i32 %56
%58 = load i32* %57
store i32 %58, i32* %v5_INTEGER
%59 = load i32* %v5_INTEGER
%60 = icmp sle i32 %59, 0
br i1 %60, label %merge003e, label %else4
else4: ; preds = %merge0027
%61 = getelementptr i8* %v8, i32 8
%62 = bitcast i8* %61 to i8**
%63 = load i8** %62
store i8* %63, i8** %v5_POINTER
%64 = load i8** %v5_POINTER
%65 = getelementptr i8* %64, i32 12
%66 = bitcast i8* %65 to...
2012 Feb 20
3
[LLVMdev] ARM opcode format
...i32* %v4_INTEGER****
>
> %57 = getelementptr i32* %55, i32 %56****
>
> %58 = load i32* %57****
>
> store i32 %58, i32* %v5_INTEGER****
>
> %59 = load i32* %v5_INTEGER****
>
> %60 = icmp sle i32 %59, 0****
>
> br i1 %60, label %merge003e, label %else4****
>
> else4: ; preds = %merge0027***
> *
>
> %61 = getelementptr i8* %v8, i32 8****
>
> %62 = bitcast i8* %61 to i8******
>
> %63 = load i8** %62****
>
> store i8* %63, i8** %v5_POINTER****
>
> %64 =...
2013 Aug 27
0
[LLVMdev] Issue with X86FrameLowering __chkstk on Windows 8 64-bit / Visual Studio 2012
...%res
> %10 = icmp eq i32 %9, 0
> br i1 %10, label %then, label %else
>
> merged: ; preds = %else, %then
> %11 = load i32* %res
> %12 = and i32 %11, -2147483648
> %13 = icmp eq i32 %12, 0
> br i1 %13, label %then3, label %else4
>
> then: ; preds = %bb
> %zf = alloca i1
> %14 = load i1* %zf
> %15 = getelementptr i8* %0, i32 148
> %16 = bitcast i8* %15 to i1*
> %17 = load i1* %16
> store volatile i1 true, i1* %16
> br label %merged
>
>...
2011 Oct 19
0
[LLVMdev] Question regarding basic-block placement optimization
...p3
%cond3 = icmp ugt i32 %val3, 3
br i1 %cond3, label %then3, label %else3, !prof !0
then3:
call void @error(i32 %i, i32 1, i32 %b)
br label %else3
else3:
%gep4 = getelementptr i32* %a, i32 4
%val4 = load i32* %gep4
%cond4 = icmp ugt i32 %val4, 4
br i1 %cond4, label %then4, label %else4, !prof !0
then4:
call void @error(i32 %i, i32 1, i32 %b)
br label %else4
else4:
%gep5 = getelementptr i32* %a, i32 3
%val5 = load i32* %gep5
%cond5 = icmp ugt i32 %val5, 3
br i1 %cond5, label %then5, label %exit, !prof !0
then5:
call void @error(i32 %i, i32 1, i32 %b)
br label %e...
2011 Oct 19
3
[LLVMdev] Question regarding basic-block placement optimization
On Tue, Oct 18, 2011 at 6:58 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote:
>
> On Oct 18, 2011, at 5:22 PM, Chandler Carruth wrote:
>
> As for why it should be an IR pass, mostly because once the selection dag
>> runs through the code, we can never recover all of the freedom we have at
>> the IR level. To start with, splicing MBBs around requires known about
2017 Jun 19
4
LLVM behavior different depending on function symbol name
Greetings,
I have a Zig implementation of ceil which is emitted into LLVM IR like this:
; Function Attrs: nobuiltin nounwind
define internal fastcc float @ceil(float) unnamed_addr #3 !dbg !644 {
Entry:
%x = alloca float, align 4
store float %0, float* %x
call void @llvm.dbg.declare(metadata float* %x, metadata !649, metadata
!494), !dbg !651
%1 = load float, float* %x, !dbg !652
%2 =
2017 Jun 19
2
LLVM behavior different depending on function symbol name
...ds = %Else
%12 = load i32, i32* %e, !dbg !90
%13 = lshr i32 8388607, %12, !dbg !92
store i32 %13, i32* %m, !dbg !93
%14 = load i32, i32* %u, !dbg !94
%15 = load i32, i32* %m, !dbg !95
%16 = and i32 %14, %15, !dbg !96
%17 = icmp eq i32 %16, 0, !dbg !97
br i1 %17, label %Then3, label %Else4, !dbg !97
Else2: ; preds = %Else
%18 = load float, float* %x, !dbg !98
%19 = fadd fast float %18, 0x4770000000000000, !dbg !100
call fastcc void @forceEval(float %19) #6, !dbg !101
%20 = load i32, i32* %u, !dbg !102
%21 = lshr i32 %20, 31, !dbg...
2017 Jun 19
2
LLVM behavior different depending on function symbol name
...lshr i32 8388607, %12, !dbg !92
>> store i32 %13, i32* %m, !dbg !93
>> %14 = load i32, i32* %u, !dbg !94
>> %15 = load i32, i32* %m, !dbg !95
>> %16 = and i32 %14, %15, !dbg !96
>> %17 = icmp eq i32 %16, 0, !dbg !97
>> br i1 %17, label %Then3, label %Else4, !dbg !97
>>
>> Else2: ; preds = %Else
>> %18 = load float, float* %x, !dbg !98
>> %19 = fadd fast float %18, 0x4770000000000000, !dbg !100
>> call fastcc void @forceEval(float %19) #6, !dbg !101
>> %20 = load i3...