Displaying 3 results from an estimated 3 matches for "else12".
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else18
2007 Jun 12
3
[LLVMdev] ARM backend problem ?
...%zero = alloca i32
%inc = alloca i32
store i32 5, i32* %n
store i32 1, i32* %f
store i32 1, i32* %i
store i32 0 , i32* %zero
store i32 1 , i32* %inc
%tmp7 = load i32* %n
%tmp8 = load i32* %zero
%tmp6 = icmp sgt i32 %tmp7, %tmp8
br i1 %tmp6, label %then4, label %else12
then4:
%tmp14 = load i32* %i
%tmp16 = load i32* %n
%tmp18 = load i32* %inc
%tmp15 = add i32 %tmp16, %tmp18
%tmp13 = icmp slt i32 %tmp14, %tmp15
br i1 %tmp13, label %then11, label %else12
then11:
%tmp20 = load i32* %f
%tmp22 = alloca i32
store i32 1 , i32* %tmp22...
2007 Jun 12
0
[LLVMdev] ARM backend problem ?
...store i32 1, i32* %f
>
> store i32 1, i32* %i
>
> store i32 0 , i32* %zero
>
> store i32 1 , i32* %inc
>
>
>
> %tmp7 = load i32* %n
>
> %tmp8 = load i32* %zero
>
> %tmp6 = icmp sgt i32 %tmp7, %tmp8
>
> br i1 %tmp6, label %then4, label %else12
>
>
>
> then4:
>
> %tmp14 = load i32* %i
>
> %tmp16 = load i32* %n
>
> %tmp18 = load i32* %inc
>
> %tmp15 = add i32 %tmp16, %tmp18
>
> %tmp13 = icmp slt i32 %tmp14, %tmp15
>
> br i1 %tmp13, label %then11, label %else12
>
>
>
>...
2013 Apr 26
0
[LLVMdev] 'LowerDbgDeclare' in Instruction combining affects scope information
...l void @llvm.dbg.value(metadata !{i32 %sub7}, i64 0, metadata !24), !dbg !38
store i32 %sub7, i32* %r, align 4, !dbg !38
br label %if.end18, !dbg !40
if.else: ; preds = %entry
%sub10 = sub i32 0, %call, !dbg !41
br i1 %cmp, label %if.then9, label %if.else12, !dbg !43
if.then9: ; preds = %if.else
call void @llvm.dbg.value(metadata !{i32 %sub10}, i64 0, metadata !36), !dbg !41
call void @llvm.dbg.value(metadata !{i32* %r}, i64 0, metadata !24), !dbg !44
call void @llvm.dbg.value(metadata !{i32* %r}, i64 0, m...