search for: else1

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2012 Feb 20
2
[LLVMdev] ARM opcode format
...ore i32 1, i32* %v4_INTEGER store i32 1, i32* %v0_INTEGER br label %label0016 label0016: ; preds = %merge003e, %merge0014 %25 = load i32* %v4_INTEGER %26 = load i32* %v3_INTEGER %27 = icmp sge i32 %25, %26 br i1 %27, label %merge001a, label %else1 else1: ; preds = %label0016 %28 = load i32* %v0_INTEGER %29 = icmp ne i32 %28, 0 br i1 %29, label %merge0027, label %else2 else2: ; preds = %else1 br label %merge001a merge001a:...
2012 Feb 20
0
[LLVMdev] ARM opcode format
...ore i32 1, i32* %v4_INTEGER store i32 1, i32* %v0_INTEGER br label %label0016 label0016: ; preds = %merge003e, %merge0014 %25 = load i32* %v4_INTEGER %26 = load i32* %v3_INTEGER %27 = icmp sge i32 %25, %26 br i1 %27, label %merge001a, label %else1 else1: ; preds = %label0016 %28 = load i32* %v0_INTEGER %29 = icmp ne i32 %28, 0 br i1 %29, label %merge0027, label %else2 else2: ; preds = %else1 br label %merge001a merge001a:...
2012 Feb 20
3
[LLVMdev] ARM opcode format
...abel0016**** > > label0016: ; preds = %merge003e, > %merge0014**** > > %25 = load i32* %v4_INTEGER**** > > %26 = load i32* %v3_INTEGER**** > > %27 = icmp sge i32 %25, %26**** > > br i1 %27, label %merge001a, label %else1**** > > else1: ; preds = %label0016*** > * > > %28 = load i32* %v0_INTEGER**** > > %29 = icmp ne i32 %28, 0**** > > br i1 %29, label %merge0027, label %else2**** > > else2:...
2011 Oct 19
0
[LLVMdev] Question regarding basic-block placement optimization
...t ifchain.ll ; RUN: opt < %s -analyze -block-freq | FileCheck %s declare void @error(i32 %i, i32 %a, i32 %b) define i32 @test(i32 %i, i32* %a, i32 %b) { entry: %gep1 = getelementptr i32* %a, i32 1 %val1 = load i32* %gep1 %cond1 = icmp ugt i32 %val1, 1 br i1 %cond1, label %then1, label %else1, !prof !0 then1: call void @error(i32 %i, i32 1, i32 %b) br label %else1 else1: %gep2 = getelementptr i32* %a, i32 2 %val2 = load i32* %gep2 %cond2 = icmp ugt i32 %val2, 2 br i1 %cond2, label %then2, label %else2, !prof !0 then2: call void @error(i32 %i, i32 1, i32 %b) br label %...
2011 Oct 19
3
[LLVMdev] Question regarding basic-block placement optimization
On Tue, Oct 18, 2011 at 6:58 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote: > > On Oct 18, 2011, at 5:22 PM, Chandler Carruth wrote: > > As for why it should be an IR pass, mostly because once the selection dag >> runs through the code, we can never recover all of the freedom we have at >> the IR level. To start with, splicing MBBs around requires known about