search for: ehsan

Displaying 20 results from an estimated 114 matches for "ehsan".

2017 Jun 01
2
restrict pointer support in LLVM 4.0
Thanks. This is probably one of the patches. So let me rephrase my questions: 1- What is the status of work to support block-local restrict-qualified pointers. 2- Does the set of patches with “llvm.noalias” label, more or less cover this work? Thanks Ehsan From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of 陳韋任 via llvm-dev Sent: Thursday, June 01, 2017 7:57 AM To: ehsanamiri at gmail.com Cc: llvm-dev Subject: Re: [llvm-dev] restrict pointer support in LLVM 4.0 Googling shows https://reviews.llvm.org/D9403, I think that's p...
2009 Apr 01
4
[LLVMdev] GSoc 2009 (Bad Subject in the previous email)
...s and preparing any doumentaion needed. In general gcc implementation of TBAA will be the base of my work, but I will read it in depth before starting the implementation, so that we can decide on any changes required before the start of coding. Please let me know if this sounds reasonable. Thanks Ehsan On Sun, Mar 29, 2009 at 6:51 PM, Evan Cheng <evan.cheng at apple.com> wrote: > Hi Ehsan, > All of the projects you have listed are quite interesting. If I were to > advocate for one, it would be #2. I think the scope of work is perfect for > GSoc. > > I'd encourage sen...
2008 Jul 17
3
Histogram with two colors depending on condition
Dear List, Say, we generate data like this- dat<-rnorm(1000,1,2) hist(dat) How do i make the histogram, say, red (col = 2) before X = dat = 0, and rest say, green (col = 3) beyond X = dat = 0 in R? The resulting histogram could be like this http://ehsan.karim.googlepages.com/histogram.JPG (edited) Thanks in advance. Ehsan http://ehsan.karim.googlepages.com/diaryofastatistician
2017 Jun 26
2
Some questions about software pipeline in LLVM 4.0.0
Hi Ehsan, In some cases modulo scheduling will insert copy instruction that end up as real copies in the final code. It unavoidable in some cases. For example, let's say a instruction defining a value is scheduled in the first iteration, but one of its uses is scheduled two iterations later. In th...
2016 Oct 21
3
Prioritizing an SDNode for scheduling
I probably misunderstood the question. You probably want to do this in SelectionDAG. On Fri, Oct 21, 2016 at 10:29 AM, Ehsan Amiri <ehsanamiri at gmail.com> wrote: > You can do this by changing instruction scheduling heuristics. I think the > more important question is if this correct always for all platforms. > > I don't know which scheduler you use. We use GenericScheduler and > PostGenericSch...
2012 May 02
0
[LLVMdev] llvm Greater Toronto Area social
On 2 May 2012 14:03, Ehsan Akhgari <ehsan.akhgari at gmail.com> wrote: > Hi everyone, > > It turns out that Wednesday would not work for me, so it would be great if > we can change this to Tuesday (the 8th), the same time.  I talked to Jeff > and Rafael and they're both fine with that.  Does this wor...
2012 May 02
2
[LLVMdev] llvm Greater Toronto Area social
8th will work for me. Can we pick a place that is not overly noisy? - Jan >________________________________ > From: Rafael Espíndola <rafael.espindola at gmail.com> >To: Ehsan Akhgari <ehsan.akhgari at gmail.com> >Cc: Jeff Muizelaar <jmuizelaar at mozilla.com>; clang-dev Developers <cfe-dev at cs.uiuc.edu>; "Minard, Brian" <brian.minard at intel.com>; LLVM Developers Mailing List <llvmdev at cs.uiuc.edu> >Sent: Wednesday, M...
2017 May 31
2
restrict pointer support in LLVM 4.0
Hi Hal, others IIRC, Hal has done some work to support block-local restrict-qualified pointers in LLVM, which was presented in CGO LLVM workshop. I was wondering if all patches for this work are now committed? Is there a way to find the list of patches for this work? Thanks Ehsan -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170531/a952186b/attachment.html>
2009 Mar 27
2
[LLVMdev] GSoc 2009 (Bad Subject in the previous email)
...allocation. This is in the same line with what I have been doing recently. The other projects below are also quite interesting for me: 2- Adding support for Type Based Alias Analysis 3- Improving handling of memcpy/memset. 4- Implementing a loop dependency analysis infrastructure. Best Regards Ehsan Amiri PS. Sorry for the wrong subject in the previous email -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090327/b4a23398/attachment.html>
2009 Mar 30
0
[LLVMdev] GSoc 2009 (Bad Subject in the previous email)
Hi Ehsan, All of the projects you have listed are quite interesting. If I were to advocate for one, it would be #2. I think the scope of work is perfect for GSoc. I'd encourage send out a more concrete proposal when you're ready. Thanks, Evan On Mar 27, 2009, at 2:35 PM, Ehsan Amiri wrote:...
2012 May 02
1
[LLVMdev] llvm Greater Toronto Area social
Hi everyone, It turns out that Wednesday would not work for me, so it would be great if we can change this to Tuesday (the 8th), the same time. I talked to Jeff and Rafael and they're both fine with that. Does this work for others who are interested in this as well? Cheers, -- Ehsan <http://ehsanakhgari.org/> On Tue, May 1, 2012 at 4:39 PM, Rafael Espíndola <rafael.espindola at gmail.com > wrote: > The next meeting is going to be Wednesday next week (9th) at 19:00. > Lets try a somewhat quieter place this time: > http://www.harbordhouse.ca. > > No...
2017 Aug 15
2
Problem of getting two unused registers in eliminateFrameIndex()
...pyPropagateBlock(llvm::MachineBasicBlock&): Assertion `!TargetRegisterInfo::isVirtualRegister(Reg) && "MachineCopyPropagation should be run after register allocation!"' failed. How can I solve my problem of getting two free registers in eliminateFrameIndex() ? Thank you, Ehsan Ali.
2016 May 26
3
RFC: FileCheck Enhancements
On Thu, May 26, 2016 at 10:35 AM, Ehsan Amiri via llvm-dev < llvm-dev at lists.llvm.org> wrote: > 7. Wildcard for prefixes - If some statements should be checked > regardless prefix, it should be used //{{*}}, //{{*}}-NEXT, //{{*}}-SAME > and etc. > >> 8. Prefix with regular expressions - If statement...
2016 May 26
0
RFC: FileCheck Enhancements
But then I should write // CHECK: something // SSE: something // SSE3: something With this feature it can be write // {{[A-Z0-9]+}} : something From: James Y Knight [mailto:jyknight at google.com] Sent: Thursday, May 26, 2016 5:53 PM To: Ehsan Amiri <ehsanamiri at gmail.com> Cc: Elena Lepilkina <Elena.Lepilkina at synopsys.com>; llvm-dev <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] RFC: FileCheck Enhancements On Thu, May 26, 2016 at 10:35 AM, Ehsan Amiri via llvm-dev <llvm-dev at lists.llvm.org<mailto:l...
2010 May 26
2
[LLVMdev] i256 for x86_64
...l I have a very simple handwritten .ll file that can be translated to native assembly on x86_64 when I use i128. But if I use i256 I get an error. see the file and the first line of the error below. Any help is appreciated! I played a little bit with target datalayout but it didn't help. Best Ehsan Input File: target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { entry:...
2011 Jul 23
2
standard error of exp(coef) from coxph
...r there is a direct way of calculating "standard error of a HR or exp(coef)" from coxph objects x <- coxph(Surv(time, status) ~ age + inst, lung)> x coef exp(coef) se(coef) z page 0.0190 1.02 0.00925 2.06 0.04inst -0.0104 0.99 0.01028 -1.01 0.31 cheers, Ehsan [[alternative HTML version deleted]]
2010 May 26
0
[LLVMdev] i256 for x86_64
On May 25, 2010, at 5:16 PM, Ehsan Amiri wrote: > Hello all > > I have a very simple handwritten .ll file that can be translated to native assembly on x86_64 when I use i128. But if I use i256 I get an error. see the file and the first line of the error below. Any help is appreciated! I played a little bit with target dat...
2016 Jun 08
2
Instruction Itineraries: question about operand latencies
...ome decisions based on actual registers that have been assigned since some registers are reserved as address space pointers and we could vary the latency based on which address space pointer register is being used - but it looks like they're virtual there) Phil On Mon, Jun 6, 2016 at 3:10 PM, Ehsan Amiri <ehsanamiri at gmail.com> wrote: > Hi Phil > > There are some comments in "include/llvm/Target/TargetItinerary.td" where > class InstrItinData is defined. > > B is the number of cycles after issue where the first operand of the > instruction is defined....
2020 Sep 29
2
Improved jump-threading in LLVM for finite state automata
...with the implementation that required some changes in the code. We started revising it,a few weeks ago. I thought now that there are multiple options, maybe we can discuss our approaches, and see if there is a preference in the community for one approach over the other ? What do you think? Thanks Ehsan On Wed, Sep 23, 2020 at 3:14 PM Sjoerd Meijer via llvm-dev < llvm-dev at lists.llvm.org> wrote: > And related while we are at it, i.e. the coremark specials, we have this > sitting in upstream review: https://reviews.llvm.org/D42365 > That should help a bit too. It needs a littl...
2011 Jun 25
2
cluster() or frailty() in coxph
Dear List, Can anyone please explain the difference between cluster() and frailty() in a coxph? I am a bit puzzled about it. Would appreciate any useful reference or direction. cheers, Ehsan > marginal.model <- coxph(Surv(time, status) ~ rx + cluster(litter), rats) > frailty.model <- coxph(Surv(time, status) ~ rx + frailty(litter), rats) > marginal.model Call: coxph(formula = Surv(time, status) ~ rx + cluster(litter), data = rats) coef exp(coef) se(coef) robust...