Displaying 20 results from an estimated 443 matches for "efriedma".
2017 Jun 27
4
My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
...trumentation/InstrProfiling.cpp.html#L512 <http://lab.llvm.org:8080/coverage/coverage-reports/llvm/coverage/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R at 2/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp.html#L512>
> On Jun 27, 2017, at 2:40 PM, Friedman, Eli <efriedma at codeaurora.org> wrote:
>
> I get a bunch of unreadable binary. Output piped to "less":
>
> String dump of section '__llvm_prf_names':
> [ 2] #<CA>^Ex<DA><D4>is<E3>(^Z<EF>^O<DD>^P<A9><D5><F7><9B...
2020 Jun 17
2
InstCombine doesn't delete instructions with token
...@foo() #0 {
entry:
unreachable
exit: ; No predecessors!
%tok = call token @llvm.bar()
ret void
}
attributes #0 = { norecurse nounwind readnone }
Where the remaining call is a wasted instruction.
On Wed, Jun 17, 2020 at 12:28 PM Eli Friedman <efriedma at quicinc.com> wrote:
> There’s no such thing as an “undef” token; you’ll get an assertion if you
> try to create one. There is “none”, but the verifier will fail in some
> cases if it sees a “none” token.
>
>
>
> In terms of actually erasing instructions, it’s specifical...
2017 Feb 17
2
LLVM Bugzilla MOVED to bugs.llvm.org
> On Feb 16, 2017, at 6:33 PM, Friedman, Eli <efriedma at codeaurora.org> wrote:
>
> On 2/16/2017 3:48 PM, Tanya Lattner wrote:
>>
>>> On Feb 13, 2017, at 11:12 AM, Friedman, Eli <efriedma at codeaurora.org <mailto:efriedma at codeaurora.org>> wrote:
>>>
>>> On 2/12/2017 7:09 PM, Tanya Lattner vi...
2017 Feb 16
2
LLVM Bugzilla MOVED to bugs.llvm.org
> On Feb 13, 2017, at 11:12 AM, Friedman, Eli <efriedma at codeaurora.org> wrote:
>
> On 2/12/2017 7:09 PM, Tanya Lattner via llvm-dev wrote:
>> All,
>>
>> http://llvm.org/bugs <http://llvm.org/bugs> has moved to bugs.llvm.org <http://bugs.llvm.org/>. You will be redirected if you attempted to access via the old...
2017 Mar 29
2
sdiv in array subscript
On Wed, Mar 29, 2017 at 2:15 PM, Friedman, Eli <efriedma at codeaurora.org>
wrote:
> On 3/29/2017 1:05 PM, Hongbin Zheng wrote:
>
>> Hi Eli,
>>
>> Thanks. Do you mean ideally we should extend SimplifyIndVar to do the
>> sdiv->udiv replacement?
>>
>
> I haven't really looked into it closely, but it seem...
2017 Jun 27
2
My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
...be larger
as there are more references to dead/unused function names.
What do you see when
readelf --string-dump=__llvm_prf_names llc
David
On Tue, Jun 27, 2017 at 2:23 PM, Xinliang David Li <davidxl at google.com>
wrote:
>
>
> On Tue, Jun 27, 2017 at 2:09 PM, Friedman, Eli <efriedma at codeaurora.org>
> wrote:
>
>> On 6/27/2017 1:47 PM, Xinliang David Li wrote:
>>
>>
>>
>> On Mon, Jun 26, 2017 at 7:24 PM, Friedman, Eli <efriedma at codeaurora.org>
>> wrote:
>>
>>> On 6/19/2017 7:29 PM, Vedant Kumar wrote:
>&g...
2019 Jun 15
3
Constrained integer DIV (WAS: Re: Planned change to IR semantics: constant expressions never have undefined behavior)
> -----Original Message-----
> From: Cameron McInally <cameron.mcinally at nyu.edu>
> Sent: Friday, June 14, 2019 4:02 PM
> To: Eli Friedman <efriedma at quicinc.com>; LLVM Developers Mailing List <llvm-
> dev at lists.llvm.org>
> Cc: Craig Topper <craig.topper at gmail.com>; Kaylor, Andrew
> <andrew.kaylor at intel.com>
> Subject: [EXT] Constrained integer DIV (WAS: Re: [llvm-dev] Planned change to
> IR semant...
2020 Jun 25
2
[RFC] Replacing inalloca with llvm.call.setup and preallocated
...ed call as handling the cleanup of
the stack in normal control flow (e.g. always for a normal call, and in the
non-exceptional path for an invoke)? Then @llvm.call.preallocated.teardown
is only necessary in the exceptional path to cleanup the stack.
On Thu, Apr 16, 2020 at 1:40 PM Eli Friedman <efriedma at quicinc.com> wrote:
>
>
> *From:* Reid Kleckner <rnk at google.com>
> *Sent:* Thursday, April 16, 2020 1:06 PM
> *To:* Eli Friedman <efriedma at quicinc.com>
> *Cc:* Arthur Eubanks <aeubanks at google.com>; llvm-dev <
> llvm-dev at lists.llvm.org>...
2019 Jun 05
2
Optimizing Compare instruction selection
...sical, BRCC instructions. This solution has proved to work fine without having to explicitly involve the SR. Of course, the SR is still implicitly involved by the correct definition of ‘Uses’ and ‘Defs’ on the corresponding instructions.
Joan Lluch
> On 3 Jun 2019, at 21:00, Eli Friedman <efriedma at quicinc.com> wrote:
>
> Have you implemented TargetRegisterInfo::getCrossCopyRegClass?
>
> -Eli
>
> From: Joan Lluch <joan.lluch at icloud.com>
> Sent: Sunday, June 2, 2019 2:39 AM
> To: Eli Friedman <efriedma at quicinc.com>
> Cc: llvm-dev <llv...
2019 Jun 11
2
Bug: Library functions for ISD::SRA, ISD::SHL, and ISD::SRL
...control applications make it worth a LLVM focus shift to the particular needs of these smaller processors. Incidentally, the AVR and the MSP430 still remain as ‘experimental’ targets.
Just my two cents anyway, and sorry for my English.
John Lluch
> On 11 Jun 2019, at 02:16, Eli Friedman <efriedma at quicinc.com> wrote:
>
> The legalization itself is simple; the issue all the places that assume shifts are legal. For example, you probably don’t want “a+a” to become a libcall.
>
> -Eli
>
> From: Joan Lluch <joan.lluch at icloud.com>
> Sent: Monday, June 10,...
2017 Jan 17
2
IR canonicalization: shufflevector or vector trunc?
...gt;
> }
>
> This may challenge the Legalizer downstream.
>
>
>
> --Zvi
>
>
>
> *From:* Sanjay Patel [mailto:spatel at rotateright.com]
> *Sent:* Friday, January 13, 2017 18:19
> *To:* Rackover, Zvi <zvi.rackover at intel.com>
> *Cc:* Friedman, Eli <efriedma at codeaurora.org>; llvm-dev <
> llvm-dev at lists.llvm.org>
>
> *Subject:* Re: [llvm-dev] IR canonicalization: shufflevector or vector
> trunc?
>
>
>
> Right - I think that case looks like this for little endian:
>
> define <2 x i32> @zextshuffle(<2...
2018 May 22
2
DSE: Remove useless stores between malloc & memset
...\n";
> }
> return false;
> }
>
> Do you know what is wrong here? I followed the "example" (in eliminateNoopStore) how to use "memoryIsNotModifiedBetween".
>
>
> Thank you for advice
>
>
>
> 2018-05-21 21:06 GMT+02:00 Friedman, Eli <efriedma at codeaurora.org>:
>
>> memoryIsNotModifiedBetween is precisely the sort of expensive walk we
>> shouldn't be doing... I'm surprised it hasn't caused any serious issues
>> yet. Ideally, what we should be doing is using MemorySSA to find a
>> dependency fr...
2020 Apr 12
3
LLVM multithreading support
On Apr 12, 2020, at 2:23 PM, Eli Friedman <efriedma at quicinc.com> wrote:
>
> Yes, the llvm::Smart* family of locks still exist. But very few places are using them outside of MLIR; it’s more common to just use plain std::mutex.
>
> That said, I don’t think it’s really a good idea to use them, even if they were fixed to work as de...
2018 Aug 16
3
[SCEV] Why is backedge-taken count <nsw> instead of <nuw>?
Ok.
To go back to the original issue, would it be meaningful to add a
SCEVUMax(0, BTC) on the final BTC computed by SCEV?
So that it does not use "negative values"?
On Wed, Aug 15, 2018 at 2:40 PM Friedman, Eli <efriedma at codeaurora.org>
wrote:
> On 8/15/2018 2:27 PM, Alexandre Isoard wrote:
>
> I'm not sure I understand the poison/undef/UB distinctions.
>
> But on this example:
>
> define i32 @func(i1 zeroext %b, i32 %x, i32 %y) {
>> entry:
>> %adds = add nsw i32 %x, %y...
2018 May 22
0
DSE: Remove useless stores between malloc & memset
...}
> return false;
> }
>
> Do you know what is wrong here? I followed the "example" (in eliminateNoopStore) how to use "memoryIsNotModifiedBetween".
>
> Thank you for advice
>
>
> 2018-05-21 21:06 GMT+02:00 Friedman, Eli <efriedma at codeaurora.org
> <mailto:efriedma at codeaurora.org>>:
>
> memoryIsNotModifiedBetween is precisely the sort of expensive
> walk we shouldn't be doing... I'm surprised it hasn't caused
> any serious issues yet. Ideally, what we shou...
2017 Jan 21
2
IR canonicalization: shufflevector or vector trunc?
...39;ll have an easier
time folding the IR if that is possible.
>
>
> --Zvi
>
>
>
> *From:* Sanjay Patel [mailto:spatel at rotateright.com]
> *Sent:* Tuesday, January 17, 2017 18:38
>
> *To:* Rackover, Zvi <zvi.rackover at intel.com>
> *Cc:* Friedman, Eli <efriedma at codeaurora.org>; llvm-dev <
> llvm-dev at lists.llvm.org>
> *Subject:* Re: [llvm-dev] IR canonicalization: shufflevector or vector
> trunc?
>
>
>
> We use InstCombiner::ShouldChangeType() to prevent transforms to illegal
> integer types, but I'm not sure how...
2018 May 22
2
DSE: Remove useless stores between malloc & memset
...5216 (opt+0x6b0216)
> #15 0x00007f6e348051c1 __libc_start_main
> /build/glibc-itYbWN/glibc-2.26/csu/../csu/libc-start.c:342:0
> #16 0x000056135d1f404a (opt+0x72f04a)
>
>
> 2018-05-22 23:32 GMT+02:00 Friedman, Eli
> <efriedma at codeaurora.org <mailto:efriedma at codeaurora.org>>:
>
> It looks like the memoryIsNotModifiedBetween assumes
> the second argument is a store, or some other
> instruction supported by MemoryLocation::get. If
>...
2017 Jan 13
2
IR canonicalization: shufflevector or vector trunc?
...t;
wrote:
> Just to add, there is also the ‘zext’ – ‘shuffle with zero’ duality which
> can broaden the discussion.
>
>
>
> --Zvi
>
>
>
> *From:* Sanjay Patel [mailto:spatel at rotateright.com]
> *Sent:* Thursday, January 12, 2017 20:19
> *To:* Friedman, Eli <efriedma at codeaurora.org>
> *Cc:* llvm-dev <llvm-dev at lists.llvm.org>; Rackover, Zvi <
> zvi.rackover at intel.com>
> *Subject:* Re: [llvm-dev] IR canonicalization: shufflevector or vector
> trunc?
>
>
>
>
>
>
>
> On Thu, Jan 12, 2017 at 11:06 AM, Fried...
2018 May 22
2
DSE: Remove useless stores between malloc & memset
...t+0x1b57bb7)
>> #14 0x000056135d175216 (opt+0x6b0216)
>> #15 0x00007f6e348051c1 __libc_start_main /build/glibc-itYbWN/glibc-2.26
>> /csu/../csu/libc-start.c:342:0
>> #16 0x000056135d1f404a (opt+0x72f04a)
>>
>>
>> 2018-05-22 23:32 GMT+02:00 Friedman, Eli <efriedma at codeaurora.org>:
>>
>>> It looks like the memoryIsNotModifiedBetween assumes the second argument
>>> is a store, or some other instruction supported by MemoryLocation::get. If
>>> you're passing in something else, you'll have to compute the MemoryLoca...
2020 Jan 21
2
MASM & RIP-relative addressing
...M code to achieve that result?
If the latter, you haven’t really given enough detail here. What code, exactly, have you tried modifying? Do you have any ideas for how it could work?
-Eli
From: Eric Astor <epastor at google.com>
Sent: Tuesday, January 21, 2020 2:44 PM
To: Eli Friedman <efriedma at quicinc.com>
Cc: llvm-dev <llvm-dev at lists.llvm.org>
Subject: [EXT] Re: [llvm-dev] MASM & RIP-relative addressing
Clarifying a minor copy/paste error, ml64.exe actually outputs:
0: 8b 05 00 00 00 00 mov eax, dword ptr [rip]
0000000000000002...