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2005 Nov 04
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TSC and Power Management Events on AMD Processors
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TSC and Power Management Events on AMD Processors
- Nov 2, 2005
- Rich Brunner, AMD Fellow
Current AMD Opteron(tm) and Athlon(tm)64 processors provide
power management mechanisms that independently adjust the
performance state ("P-state") and power state ("C-state") of
the processor[1][2]; these state changes can affect a