Displaying 1 result from an estimated 1 matches for "ee9fcaa7".
2014 Mar 08
3
[LLVMdev] Isel DAG documentation?
I'm having a great deal of trouble figuring out how to write instruction
patterns which actually match the DAG produced by the compiler. I can't
seem to find any documentation on both what the various nodes represent
or on what the syntax accepted by TableGen is. The backends I have
access to all seem to do this in different (and obscure) ways. And when
things go wrong the compiler seems