search for: edsp

.../arm/arm_silk_map.c index 53a60a0..04767b5 100644 --- a/silk/arm/arm_silk_map.c +++ b/silk/arm/arm_silk_map.c @@ -48,7 +48,7 @@ void (*const SILK_BIQUAD_ALT_STRIDE2_IMPL[OPUS_ARCHMASK + 1])( silk_biquad_alt_stride2_c, /* ARMv4 */ silk_biquad_alt_stride2_c, /* EDSP */ silk_biquad_alt_stride2_c, /* Media */ - MAY_HAVE_NEON(silk_biquad_alt_stride2), /* Neon */ + silk_biquad_alt_stride2_neon, /* Neon */ }; opus_int32 (*const SILK_LPC_INVERSE_PRED_GAIN_IMPL[OPUS_ARCHMASK + 1])( /* O Returns inverse prediction gain in energy...

.................. yes C99 lrintf: .................... yes Use alloca: .................... no (using var arrays) General configuration: Floating point support: ........ no Fast float approximations: ..... no Fixed point debugging: ......... no Inline Assembly Optimizations: . ARM (EDSP) (Media) External Assembly Optimizations: ARM (EDSP) (Media) Intrinsics Optimizations.......: ARM (NEON) Run-time CPU detection: ........ ARM (NEON) (NEON Intrinsics) Custom modes: .................. no Assertion checking: ............ no Fuzzing: ..................

...>> >> When configuring with floating-point and intrinsics enabled as above, the >> generated config.h only has OPUS_ARM_MAY_HAVE_NEON_INTR defined (to 1), >> with >> /* #undef OPUS_ARM_ASM */ >> /* #undef OPUS_ARM_INLINE_ASM */ >> /* #undef OPUS_ARM_INLINE_EDSP */ >> /* #undef OPUS_ARM_INLINE_MEDIA */ >> /* #undef OPUS_ARM_INLINE_NEON */ >> /* #undef OPUS_ARM_MAY_HAVE_EDSP */ >> /* #undef OPUS_ARM_MAY_HAVE_MEDIA */ >> /* #undef OPUS_ARM_MAY_HAVE_NEON */ >> /* #undef OPUS_ARM_PRESUME_AARCH64_NEON_INTR */ >> /* #und...

................... no (using var arrays) > > > > General configuration: > > > > Floating point support: ........ no > > Fast float approximations: ..... no > > Fixed point debugging: ......... no > > Inline Assembly Optimizations: . ARM (EDSP) (Media) > > External Assembly Optimizations: ARM (EDSP) (Media) > > Intrinsics Optimizations.......: ARM (NEON) > > Run-time CPU detection: ........ ARM (NEON) (NEON Intrinsics) > > Custom modes: .................. no > > Assertion checki...

...post: http://lists.xiph.org/pipermail/speex-dev/2005-June/003485.html that this version of speex works fine on ARM platforms. My configuration is: # cat /proc/cpuinfo Processor : ARM926EJ-Sid(wb) rev 3 (v5l) BogoMIPS : 95.83 (about 192 MHz) Features : swp half thumb fastmult edsp java CPU implementer : 0x41 CPU architecture: 5TEJ CPU variant : 0x0 CPU part : 0x926 CPU revision : 3 Cache type : write-back Cache clean : cp15 c7 ops Cache lockdown : format C Cache format : Harvard # gcc --version arm-linux-gcc (GCC) 3.3.2 (Debian) Configuration: -...

.../celt/arm/arm_celt_map.c @@ -35,38 +35,20 @@ #if defined(OPUS_HAVE_RTCD) -# if defined(FIXED_POINT) -opus_val32 (*const CELT_PITCH_XCORR_IMPL[OPUS_ARCHMASK+1])(const opus_val16 *, - const opus_val16 *, opus_val32 *, int , int) = { - celt_pitch_xcorr_c, /* ARMv4 */ - MAY_HAVE_EDSP(celt_pitch_xcorr), /* EDSP */ - MAY_HAVE_MEDIA(celt_pitch_xcorr), /* Media */ - MAY_HAVE_NEON(celt_pitch_xcorr) /* NEON */ -}; -# else /* !FIXED_POINT */ -# if defined(OPUS_ARM_MAY_HAVE_NEON_INTR) -void (*const CELT_PITCH_XCORR_IMPL[OPUS_ARCHMASK+1])(const opus_val16 *, - const opus_val16...

Dear Mr Anvin, we use SYSLINUX for our industrial embedded devices and it works very good. You can see them at www.control.de (EDSP and TRZB) if you want. Questions 1: I didnt find out how to put the DOS mbr, delivered with SYSLINUX, to my bootdevice. What is the right command? Question 2: When I want to use PXELINUX with a BIOS that does not support Network boot via PXE is it possible to write a PXE boot stack to a floppy...

...y that a given CPU architecture also implies all lower-capability architectures. Unfortunately, the ARM opus_cpu_capabilities function only currently checks for those architectures that are enabled in the configuration, and thus —disable-asm — or a floating-point build — doesn’t check for Media or EDSP. Thus, RTCD for these configurations doesn’t end up taking advantage of Neon Intrinsics support. The attached patch should fix this, by checking for a CPU feature if the feature or any higher feature is enabled in the configuration. -------------- next part -------------- A non-text attachment w...

.... yes > Use alloca: .................... no (using var arrays) > > General configuration: > > Floating point support: ........ no > Fast float approximations: ..... no > Fixed point debugging: ......... no > Inline Assembly Optimizations: . ARM (EDSP) (Media) > External Assembly Optimizations: ARM (EDSP) (Media) > Intrinsics Optimizations.......: ARM (NEON) > Run-time CPU detection: ........ ARM (NEON) (NEON Intrinsics) > Custom modes: .................. no > Assertion checking: ............ no >...

...ar arrays) > > > > General configuration: > > > > Floating point support: ........ no > > Fast float approximations: ..... no > > Fixed point debugging: ......... no > > Inline Assembly Optimizations: . ARM (EDSP) (Media) > > External Assembly Optimizations: ARM (EDSP) (Media) > > Intrinsics Optimizations.......: ARM (NEON) > > Run-time CPU detection: ........ ARM (NEON) (NEON Intrinsics) > > Custom modes: .................. no > >...

...n-linux-gnueabihf --target=armv7l-unknown-linux-gnueabihf --with-cpu=cortex-a9 --with-fpu=neon --with-float=hard --enable-optimized $ cat /proc/cpuinfo Processor : ARMv7 Processor rev 0 (v7l) processor : 0 BogoMIPS : 1992.29 processor : 1 BogoMIPS : 1992.29 Features : swp half thumb fastmult vfp edsp vfpv3 vfpv3d16 CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x1 CPU part : 0xc09 CPU revision : 0 Any ideas? Dmitri -- main(i,j){for(i=2;;i++){for(j=2;j<i;j++){if(!(i%j)){j=0;break;}}if (j){printf("%d\n",i);}}} /*Dmitri Gribenko <gribozavr at gmail.com>*/

...l > > that this version of speex works fine on ARM platforms. My configuration > > is: > > > > # cat /proc/cpuinfo > > Processor : ARM926EJ-Sid(wb) rev 3 (v5l) > > BogoMIPS : 95.83 (about 192 MHz) > > Features : swp half thumb fastmult edsp java > > CPU implementer : 0x41 > > CPU architecture: 5TEJ > > CPU variant : 0x0 > > CPU part : 0x926 > > CPU revision : 3 > > Cache type : write-back > > Cache clean : cp15 c7 ops > > Cache lockdown : format C > > Cache...

...C99 lrintf: .................... yes Use alloca: .................... no (using var arrays) General configuration: Floating point support: ........ no Fast float approximations: ..... no Fixed point debugging: ......... yes Inline Assembly Optimizations: . ARM (EDSP) (Media) External Assembly Optimizations: ARM (EDSP) (Media) Intrinsics Optimizations.......: no Run-time CPU detection: ........ ARM (NEON) Custom modes: .................. yes Assertion checking: ............ yes Fuzzing: ....................... no API d...

...[asm_optimization="disabled"]) if test "x${asm_optimization}" = "xARM" ; then + AC_DEFINE([ARM_ASM], 1, [Use generic ARM asm optimizations]) AC_DEFINE([ARMv4_ASM], 1, [Use generic ARMv4 asm optimizations]) AS_ASM_ARM_EDSP([ARMv5E_ASM=1],[ARMv5E_ASM=0]) if test "x${ARMv5E_ASM}" = "x1" ; then diff --git a/opus_headers.mk b/opus_headers.mk index 43a978c..2c7c077 100644 --- a/opus_headers.mk +++ b/opus_headers.mk @@ -2,6 +2,7 @@ OPUS_HEAD = \ include/opus.h \ include/opus_multistream.h...

...t_mdct_backward_float_neon(const mdct_lookup *l, } RESTORE_STACK; } +#endif /* !defined(FIXED_POINT) */ diff --git a/celt/arm/pitch_arm.h b/celt/arm/pitch_arm.h index 8626ed7..344186b 100644 --- a/celt/arm/pitch_arm.h +++ b/celt/arm/pitch_arm.h @@ -57,7 +57,7 @@ opus_val32 celt_pitch_xcorr_edsp(const opus_val16 *_x, const opus_val16 *_y, #if defined(OPUS_ARM_MAY_HAVE_NEON_INTR) void celt_pitch_xcorr_float_neon(const opus_val16 *_x, const opus_val16 *_y, opus_val32 *xcorr, int len, int max_pitch); -#if !defined(OPUS_HAVE_RTCD) || defined(OPUS_ARM_PRESUME...

The following failures are consistent on buildbot (and my local box). The Clang one I think it's assuming an Intel box, the other two look like the FileCheck are not good enough. http://lab.llvm.org:8011/builders/clang-native-arm-cortex-a9/builds/4305 Clang :: CodeGen/compound-assign-overflow.c LLVM :: Transforms/LoopStrengthReduce/post-inc-icmpzero.ll LLVM ::

Hi Linfeng, On 06/06/17 04:09 PM, Jonathan Lennox wrote: > Two comments on the various infrastructure for RTCD etc. > > 1. The 0002- patch changes the ABI of the celt_pitch_xcorr functions, > but doesn’t change the assembly in celt/arm/celt_pitch_xcorr_arm.s > correspondingly. I suspect the ‘arch’ parameter can just be ignored > by the assembly functions, but at least the

Should call celt_inner_prod(). --- celt/bands.c | 7 ++++--- celt/bands.h | 2 +- celt/celt_encoder.c | 6 +++--- celt/pitch.c | 2 +- src/opus_multistream_encoder.c | 2 +- 5 files changed, 10 insertions(+), 9 deletions(-) diff --git a/celt/bands.c b/celt/bands.c index bbe8a4c..1ab24aa 100644 --- a/celt/bands.c +++ b/celt/bands.c

Hello, I received feedback from engineers working on NE10 [1] that it would be better to use NE10 [1] for FFT optimizations for opus use cases. However, these FFT patches are currently in review and haven't been integrated into NE10 yet. While the FFT functions in NE10 are getting baked, I wanted to optimize the celt_pitch_xcorr (floating point only) and use it to introduce ARM NEON

...of specific object files, e.g., $(SSE_OBJ): CFLAGS += -msse4.1 > +void (*const CELT_PITCH_XCORR_IMPL[OPUS_ARCHMASK+1])(const opus_val16 *, > + const opus_val16 *, opus_val32 *, int , int, int) = { > + celt_pitch_xcorr_c, /* ARMv4 */ > + celt_pitch_xcorr_c, /* EDSP */ > + celt_pitch_xcorr_c, /* Media */ > +#if defined(OPUS_ARM_NEON_INTR) > + celt_pitch_xcorr_float_neon /* Neon */ Please do not use tabs in source code (this applies here and everywhere below). Even with the tabs expanded in context, the comments here do not line up properly....