Displaying 3 results from an estimated 3 matches for "edjimucation".
2013 Apr 18
0
[LLVMdev] MachineOperand SubReg
On Apr 18, 2013, at 9:45 AM, dag at cray.com wrote:
> I'm working on the post-regalloc dataflow engine I mentioned yesterday.
> Currently I only need to track register operands.
>
> A MachineOperand has both a getReg() and a getSubReg() interface. For a
> physical register operand, is getReg() guaranteed to be the "most super"
> register with getSubReg()
2013 Apr 18
4
[LLVMdev] MachineOperand SubReg
I'm working on the post-regalloc dataflow engine I mentioned yesterday.
Currently I only need to track register operands.
A MachineOperand has both a getReg() and a getSubReg() interface. For a
physical register operand, is getReg() guaranteed to be the "most super"
register with getSubReg() providing the specific subregister information
for the operand? If so then for my current
2013 Apr 19
2
[LLVMdev] MachineOperand SubReg
...The graph of sub/super-register
> relationships is also not a tree, it is a DAG.
Hmm. I don't doubt it but can you give me an example of a case where
there is no "most super" register? I'm having a hard time thinking up
how one would design such an ISA. Need to increase my edjimucation.
> We try to track anything related to register aliasing in terms of
> register units. See MCRegisterInfo.h and TargetRegisterInfo.h. I
> believe regunits are equivalent to maximal cliques of the register
> aliasing graph if you're mathematically inclined.
Ok, I'll check that...