Displaying 7 results from an estimated 7 matches for "early_clobber".
2013 Jan 23
3
[LLVMdev] Instruction Constraints Question
>> It doesn't look like TableGen supports Constraints beyond EARLY_CLOBBER
>> and TIED_TO. We would need to add a constraint such as "$dst != $src1,
>> $dst != $mask, $src1 != $mask" to the current patterns to enforce the
>> rules.
> You can emulate such constraints via early clobbing. Just mark dst as
> early clobbing.
How would that (...
2013 Jan 23
4
[LLVMdev] Instruction Constraints Question
...rding to the AVX2 manual, no two of the destination register, vector
index register and mask register can be the same. The patterns in
X86InstrSSE.td are missing this constraint and it's possible to generate
an illegal instruction.
It doesn't look like TableGen supports Constraints beyond EARLY_CLOBBER
and TIED_TO. We would need to add a constraint such as "$dst != $src1,
$dst != $mask, $src1 != $mask" to the current patterns to enforce the
rules.
Is there another mechanism to suport a constraint like this or is
hacking TableGen the best way to do it? If the latter, does anyone have...
2013 Jan 23
0
[LLVMdev] Instruction Constraints Question
On Wed, Jan 23, 2013 at 4:40 PM, Tim Northover <t.p.northover at gmail.com>wrote:
> >> It doesn't look like TableGen supports Constraints beyond EARLY_CLOBBER
> >> and TIED_TO. We would need to add a constraint such as "$dst != $src1,
> >> $dst != $mask, $src1 != $mask" to the current patterns to enforce the
> >> rules.
> > You can emulate such constraints via early clobbing. Just mark dst as
> > early cl...
2013 Jan 23
0
[LLVMdev] Instruction Constraints Question
> It doesn't look like TableGen supports Constraints beyond EARLY_CLOBBER
> and TIED_TO. We would need to add a constraint such as "$dst != $src1,
> $dst != $mask, $src1 != $mask" to the current patterns to enforce the
> rules.
You can emulate such constraints via early clobbing. Just mark dst as
early clobbing.
> Is there another mechanism to sup...
2013 Jan 23
2
[LLVMdev] Instruction Constraints Question
Anton Korobeynikov <anton at korobeynikov.info> writes:
>> It doesn't look like TableGen supports Constraints beyond EARLY_CLOBBER
>> and TIED_TO. We would need to add a constraint such as "$dst != $src1,
>> $dst != $mask, $src1 != $mask" to the current patterns to enforce the
>> rules.
> You can emulate such constraints via early clobbing. Just mark dst as
> early clobbing.
Actually, I'...
2013 Jan 23
1
[LLVMdev] Instruction Constraints Question
On 1/23/2013 3:33 PM, Anton Korobeynikov wrote:
>> It doesn't look like TableGen supports Constraints beyond EARLY_CLOBBER
>> and TIED_TO. We would need to add a constraint such as "$dst != $src1,
>> $dst != $mask, $src1 != $mask" to the current patterns to enforce the
>> rules.
> You can emulate such constraints via early clobbing. Just mark dst as
> early clobbing.
How would you em...
2013 Jan 23
0
[LLVMdev] Instruction Constraints Question
On Jan 23, 2013, at 2:38 PM, dag at cray.com wrote:
> Anton Korobeynikov <anton at korobeynikov.info> writes:
>
>>> It doesn't look like TableGen supports Constraints beyond EARLY_CLOBBER
>>> and TIED_TO. We would need to add a constraint such as "$dst != $src1,
>>> $dst != $mask, $src1 != $mask" to the current patterns to enforce the
>>> rules.
>
>> You can emulate such constraints via early clobbing. Just mark dst as
>> early c...