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..._iomem *ioaddr = vp_dev->ioaddr + - VIRTIO_PCI_CONFIG(vp_dev) + offset; + void __iomem *ioaddr = vp_dev->ioaddr + offset + + VIRTIO_PCI_CONFIG(vp_dev->msix_enabled); const u8 *ptr = buf; int i; diff --git a/include/uapi/linux/virtio_pci.h b/include/uapi/linux/virtio_pci.h index ea66f3f..610c6c6 100644 --- a/include/uapi/linux/virtio_pci.h +++ b/include/uapi/linux/virtio_pci.h @@ -80,7 +80,7 @@ /* The remaining space is defined by each driver as the per-driver * configuration space */ -#define VIRTIO_PCI_CONFIG(dev) ((dev)->msix_enabled ? 24 : 20) +#define VIRTIO_PCI_CONF...

..._iomem *ioaddr = vp_dev->ioaddr + - VIRTIO_PCI_CONFIG(vp_dev) + offset; + void __iomem *ioaddr = vp_dev->ioaddr + offset + + VIRTIO_PCI_CONFIG(vp_dev->msix_enabled); const u8 *ptr = buf; int i; diff --git a/include/uapi/linux/virtio_pci.h b/include/uapi/linux/virtio_pci.h index ea66f3f..610c6c6 100644 --- a/include/uapi/linux/virtio_pci.h +++ b/include/uapi/linux/virtio_pci.h @@ -80,7 +80,7 @@ /* The remaining space is defined by each driver as the per-driver * configuration space */ -#define VIRTIO_PCI_CONFIG(dev) ((dev)->msix_enabled ? 24 : 20) +#define VIRTIO_PCI_CONF...

...NDR_CAP_LEN 2 /* Capability length (8 bits), including + bytes: ID, NEXT and LEN itself. */ + /* PCI Bridge Subsystem ID registers */ #define PCI_SSVID_VENDOR_ID 4 /* PCI-Bridge subsystem vendor id register */ diff --git a/include/linux/virtio_pci.h b/include/linux/virtio_pci.h index ea66f3f..d6568e7 100644 --- a/include/linux/virtio_pci.h +++ b/include/linux/virtio_pci.h @@ -92,4 +92,45 @@ /* The alignment to use between consumer and producer parts of vring. * x86 pagesize again. */ #define VIRTIO_PCI_VRING_ALIGN 4096 + +/* + * Layout for Virtio PCI vendor specific capability (li...

...NDR_CAP_LEN 2 /* Capability length (8 bits), including + bytes: ID, NEXT and LEN itself. */ + /* PCI Bridge Subsystem ID registers */ #define PCI_SSVID_VENDOR_ID 4 /* PCI-Bridge subsystem vendor id register */ diff --git a/include/linux/virtio_pci.h b/include/linux/virtio_pci.h index ea66f3f..d6568e7 100644 --- a/include/linux/virtio_pci.h +++ b/include/linux/virtio_pci.h @@ -92,4 +92,45 @@ /* The alignment to use between consumer and producer parts of vring. * x86 pagesize again. */ #define VIRTIO_PCI_VRING_ALIGN 4096 + +/* + * Layout for Virtio PCI vendor specific capability (li...

...NDR_CAP_LEN 2 /* Capability length (8 bits), including + bytes: ID, NEXT and LEN itself. */ + /* PCI Bridge Subsystem ID registers */ #define PCI_SSVID_VENDOR_ID 4 /* PCI-Bridge subsystem vendor id register */ diff --git a/include/linux/virtio_pci.h b/include/linux/virtio_pci.h index ea66f3f..d6568e7 100644 --- a/include/linux/virtio_pci.h +++ b/include/linux/virtio_pci.h @@ -92,4 +92,45 @@ /* The alignment to use between consumer and producer parts of vring. * x86 pagesize again. */ #define VIRTIO_PCI_VRING_ALIGN 4096 + +/* + * Layout for Virtio PCI vendor specific capability (li...

...NDR_CAP_LEN 2 /* Capability length (8 bits), including + bytes: ID, NEXT and LEN itself. */ + /* PCI Bridge Subsystem ID registers */ #define PCI_SSVID_VENDOR_ID 4 /* PCI-Bridge subsystem vendor id register */ diff --git a/include/linux/virtio_pci.h b/include/linux/virtio_pci.h index ea66f3f..d6568e7 100644 --- a/include/linux/virtio_pci.h +++ b/include/linux/virtio_pci.h @@ -92,4 +92,45 @@ /* The alignment to use between consumer and producer parts of vring. * x86 pagesize again. */ #define VIRTIO_PCI_VRING_ALIGN 4096 + +/* + * Layout for Virtio PCI vendor specific capability (li...

I've renewed this again, with some comments from HPA. I've tried to keep the new patches separate, so you can see the changes since we last discussed this (and so it's easy to back it out if we decide it's insane). I haven't even looked at the QEMU side so this is completely untested. Comments gratefully received! Rusty. Michael S Tsirkin (1): pci: add pci_iomap_range

I've renewed this again, with some comments from HPA. I've tried to keep the new patches separate, so you can see the changes since we last discussed this (and so it's easy to back it out if we decide it's insane). I haven't even looked at the QEMU side so this is completely untested. Comments gratefully received! Rusty. Michael S Tsirkin (1): pci: add pci_iomap_range