search for: e92d4800

Displaying 10 results from an estimated 10 matches for "e92d4800".

2012 Jul 06
3
[LLVMdev] Problem with __inline keyword
...to have any of the function definitions in it--just undefined references to external symbols. Specifically, if I have the following test program: __inline int foo() { return 5; } int bar() { return foo(); } Compiling for ARM with no optimizations yields this: 00000000 <bar>: 0: e92d4800 push {fp, lr} 4: e1a0b00d mov fp, sp 8: e24dd008 sub sp, sp, #8 c: ebfffffe bl 0 <foo> 10: e58d0004 str r0, [sp, #4] 14: e1a0d00b mov sp, fp 18: e8bd4800 pop {fp, lr} 1c: e12fff1e...
2014 May 30
3
[LLVMdev] Error with Gold Linker during LTO
So you see the issue as well in ARM? When doing a objdump -D weakMainO1.exe | grep -A 10 "<_ZN1C13caller_methodEv>:" I see: 00008b88 <_ZN1C13caller_methodEv>: 8b88: e92d4800 push {fp, lr} 8b8c: e1a0b00d mov fp, sp 8b90: e24dd008 sub sp, sp, #8 8b94: e58d0004 str r0, [sp, #4] 8b98: e59d0004 ldr r0, [sp, #4] 8b9c: ebffdd17 bl 0 <__preinit_array_end> 8ba0: e1a0d00b mov sp, fp 8ba4: e8bd4800 pop {fp, lr} 8ba8: e12fff1e bx lr...
2012 Jul 18
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
...-name arm-none-linux-gnueabi-g++ -ccc-host-triple thumbv7m-none-gnueabi testReference.cpp -c It seems like it worked. $ arm-none-linux-gnueabi-objdump -D --section=.text testReference.o testReference.o: file format elf32-littlearm Disassembly of section .text: 00000000 <main>: 0: e92d4800 push {fp, lr} 4: e1a0b00d mov fp, sp 8: e24dd030 sub sp, sp, #48 ; 0x30 ... I'm not 100% sure if that's the correct ISA, because I haven't run the code, but it seems ok. I of course own you a beer :-) Thank you very much. Now, a grep of clang++ --ccc-gcc-name didn't give...
2012 Jul 18
3
[LLVMdev] Setting up a cross-compiler for cortex-m3
On 18 July 2012 15:46, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c > --sysroot=/home/emitrax/CodeSourcery/Sourcery_G++_Lite/arm-none-linux-gnueabi/libc/ Try -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple thumbv7m-none-linux-gnueabi Sometimes it's better than sysroot, as it finds it
2012 Feb 16
2
[LLVMdev] difference in function prologue generated with clang and gcc
...ux-gnueabi -ccc-clang-archs arm -march=armv7-a -mtune=cortex-a8 -mfloat-abi=softfp -mfpu=vfp -g -lm -o all-types Dissassembly of main() from all-types.c compiled with GCC. 00008448 <main>: float v_float; double v_double; int main () { 8448: e92d4800 push {fp, lr} 844c: e28db004 add fp, sp, #4 extern void dummy(); #ifdef usestubs set_debug_traps(); breakpoint(); #endif dummy(); 8450: eb000002 bl 8460 <dummy> return 0; 8454: e3a...
2010 Jan 18
1
[LLVMdev] JIT on ARM
...s: ********** Function: main Ifcvt: function (0) 'main' block 0 offset 0 size 40 block 0 offset 0 size 40 JITTing function 'main' JIT: Starting CodeGen of Function main JIT: Emitting BB0 at [0x4512e010] JIT: 0x4512e010: STM %SP, 12, 14, %reg0, %R11<kill>, %LR<kill> 0xe92d4800 JIT: 0x4512e014: %SP<def> = SUBri %SP<kill>, 8, 14, %reg0, %reg0 0xe24dd008 JIT: 0x4512e018: %R0<def> = MOVi 20, 14, %reg0, %reg0 0xe3a00014 JIT: 0x4512e01c: STR %R0<kill>, %SP, %reg0, 4, 14, %reg0, Mem:ST(4,4) [b + 0] 0xe58d0004 JIT: 0x4512e020: %R0<def> = ADDri...
2014 May 30
2
[LLVMdev] Error with Gold Linker during LTO
...5:48, Daniel Stewart <stewartd at codeaurora.org> wrote: > So you see the issue as well in ARM? When doing a > > objdump -D weakMainO1.exe | grep -A 10 "<_ZN1C13caller_methodEv>:" > > I see: > > 00008b88 <_ZN1C13caller_methodEv>: > 8b88: e92d4800 push {fp, lr} > 8b8c: e1a0b00d mov fp, sp > 8b90: e24dd008 sub sp, sp, #8 > 8b94: e58d0004 str r0, [sp, #4] > 8b98: e59d0004 ldr r0, [sp, #4] > 8b9c: ebffdd17 bl 0 <...
2012 Jul 22
3
[LLVMdev] Setting up a cross-compiler for cortex-m3
...7m-none-gnueabi testReference.cpp -c > > It seems like it worked. > > $ arm-none-linux-gnueabi-objdump -D --section=.text testReference.o > > testReference.o: file format elf32-littlearm > > > Disassembly of section .text: > > 00000000 <main>: > 0: e92d4800 push {fp, lr} > 4: e1a0b00d mov fp, sp > 8: e24dd030 sub sp, sp, #48 ; 0x30 > ... > > I'm not 100% sure if that's the correct ISA, because I haven't run the > code, but it seems ok. > Unfortunately, I have to resurrect...
2014 May 30
4
[LLVMdev] Error with Gold Linker during LTO
We've found an error during the use of LTO that appears to happen only during the use of the gold linker. We essentially have a file which is compiled *without* LTO: f1() { h1(); } And a second file that is compiled/linked *with* LTO: f2() { f1(); h1(); } This second file has the function h1() inlined during LTO. The resulting executable fails because the symbol for h1
2017 Sep 05
4
Lowering llvm.memset for ARM target
As reported in an earlier thread (http://clang-developers.42468.n3.nabble.com/Disable-memset-synthesis-tp4057810.html), we noticed in some cases that the llvm.memset intrinsic, if lowered to stores, could help with performance. Here's a test case: If LIMIT is > 8, I see that a call to memset is emitted for arm & aarch64, but not for x86 target. typedef struct { int v0[100]; }