search for: e820_reserved

...b1857981e6 -r 51e9c0c806b2 xen/include/asm-x86/e820.h --- a/xen/include/asm-x86/e820.h Tue Aug 16 19:38:22 2005 +++ b/xen/include/asm-x86/e820.h Wed Aug 17 17:00:29 2005 @@ -3,7 +3,7 @@ #include <asm/page.h> -#define E820MAX 32 +#define E820MAX 128 #define E820_RAM 1 #define E820_RESERVED 2 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

.../xen/setup.c @@ -61,9 +61,9 @@ char * __init xen_memory_setup(void) * - xen_start_info * See comment above "struct start_info" in <xen/interface/xen.h> */ - e820_add_region(__pa(xen_start_info->mfn_list), - xen_start_info->pt_base - xen_start_info->mfn_list, - E820_RESERVED); + reserve_early(__pa(xen_start_info->mfn_list), + __pa(xen_start_info->pt_base), + "XEN START INFO"); sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map); -- 1.6.0.6 _______________________________________________ Xen-devel mailing list Xen-deve...

...E, diff --git a/arch/x86/kernel/tboot.c b/arch/x86/kernel/tboot.c index b868fa1b812b..a6b57d8d0b9b 100644 --- a/arch/x86/kernel/tboot.c +++ b/arch/x86/kernel/tboot.c @@ -70,7 +70,7 @@ void __init tboot_probe(void) */ if (!e820_any_mapped(boot_params.tboot_addr, boot_params.tboot_addr, E820_RESERVED)) { - pr_warning("non-0 tboot_addr but it is not of type E820_RESERVED\n"); + pr_warn("non-0 tboot_addr but it is not of type E820_RESERVED\n"); return; } @@ -78,13 +78,12 @@ void __init tboot_probe(void) set_fixmap(FIX_TBOOT_BASE, boot_params.tboot_addr); tboot = (...

This patch applies to c/s #15522. Nativedom 1:1 memory enabling - Done by "stealing" memory from Xen''s e820 at boot time. The pages are later being allocated to NativeDom using a special allocator. x86-64 ====== The 512KB-1MB region is remapped (because of the ROMs) to an address above 16MB. As far as NativeDom can see: 1. The 0-512KB

This patch adds an implementation of the TCG BIOS extensions to the Bochs BIOS and enables logging of boot measurements using the previously implemented support for TCPA ACPI tables. A low-level driver for a TPM TIS device and an Atmel device is provided. The implemented specification is described here:

...en/dmi.h> #include <asm/amd.h> +#include <asm/e820.h> #include <asm/msr.h> #include <asm/processor.h> @@ -131,7 +132,8 @@ static void __init get_fam10h_pci_mmconf return; out: - fam10h_pci_mmconf_base = start; + if (e820_add_range(&e820, start, start + SIZE, E820_RESERVED)) + fam10h_pci_mmconf_base = start; } void __cpuinit fam10h_check_enable_mmcfg(void) --- a/xen/include/asm-x86/e820.h +++ b/xen/include/asm-x86/e820.h @@ -28,6 +28,8 @@ extern int reserve_e820_ram(struct e820m extern int e820_change_range_type( struct e820map *e820, uint64_t s, uint64_t...

The XenPVHVM extensions have not been tested much on very old hypervisors. At least Xen 3.4 gets some testing with the pvops kernel. Require at least Xen 3.4 for the PVonHVM extensions. If an older hypervisor is detected the extensions will be disabled and the guest will only see emulated hardware. Signed-off-by: Olaf Hering <olaf@aepfle.de> --- arch/x86/xen/enlighten.c | 27

I just built 4.3.0 in order to get > 2GB of RAM in domU with GPU passthrough without crashes. Unfortunately, the same crashes still happen. Massive frame buffer corruption on domU before it locks up solid. It seems the PCI memory stomp is still happening. I am using qemu-dm, as I did on Xen 4.2.x. So whatever fix for this went into 4.3.0 didn''t fix it for me. Passing less than 2GB

There are ~4300 uses of pr_warn and ~250 uses of the older pr_warning in the kernel source tree. Make the use of pr_warn consistent across all kernel files. This excludes all files in tools/ as there is a separate define pr_warning for that directory tree and pr_warn is not used in tools/. Done with 'sed s/\bpr_warning\b/pr_warn/' and some emacsing. Miscellanea: o Coalesce formats and

There are ~4300 uses of pr_warn and ~250 uses of the older pr_warning in the kernel source tree. Make the use of pr_warn consistent across all kernel files. This excludes all files in tools/ as there is a separate define pr_warning for that directory tree and pr_warn is not used in tools/. Done with 'sed s/\bpr_warning\b/pr_warn/' and some emacsing. Miscellanea: o Coalesce formats and

There are ~4300 uses of pr_warn and ~250 uses of the older pr_warning in the kernel source tree. Make the use of pr_warn consistent across all kernel files. This excludes all files in tools/ as there is a separate define pr_warning for that directory tree and pr_warn is not used in tools/. Done with 'sed s/\bpr_warning\b/pr_warn/' and some emacsing. Miscellanea: o Coalesce formats and

..._OFFSET); + num_entries = *((uint8_t *) (E820_MAP_PAGE + E820_MAP_NR_OFFSET)); + + /* walk through e820map, ignoring any entries that aren''t marked + as usable or reserved. */ + + for (i = 0; i < num_entries; i++) { + if (map->type == E820_RAM || map->type == E820_RESERVED) + memsize += map->size; + map++; + } + + /* Round up to the nearest MB. The user specifies domU + pseudo-physical memory in megabytes, so not doing this + could easily lead to reporting one less MB than the user + specified. */ + if (memsize & (...

...* PAGE_SIZE; + e820[nr].size = 3 * PAGE_SIZE; e820[nr].type = E820_NVS; nr++; - e820[nr].addr = igd_opregion_base + 2 * PAGE_SIZE; + e820[nr].addr = igd_opregion_base + 3 * PAGE_SIZE; e820[nr].size = (uint32_t)-e820[nr].addr; e820[nr].type = E820_RESERVED; nr++; diff -r 11b4bc743b1f tools/firmware/hvmloader/pci.c --- a/tools/firmware/hvmloader/pci.c Mon Dec 17 14:59:11 2012 +0000 +++ b/tools/firmware/hvmloader/pci.c Thu Dec 20 00:07:40 2012 +0800 @@ -98,7 +98,7 @@ void pci_setup(void) virtual_vga = VGA_pt;...

...atch:0 [ 0.000000] DMA32 zone: 12135 pages used for memmap [ 0.000000] DMA32 zone: 776627 pages, LIFO batch:31 [ 0.000000] Normal zone: 118784 pages used for memmap [ 0.000000] Normal zone: 7602176 pages, LIFO batch:31 [ 0.000000] tboot: non-0 tboot_addr but it is not of type E820_RESERVED [ 0.000000] ACPI: PM-Timer IO Port: 0x408 [ 0.000000] ACPI: Local APIC address 0xfee00000 [ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) [ 0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled) [ 0.000000] ACPI: LAPIC (acpi_id[0x04] lapic_id[0x04] enabled) [...

...batch:0 [ 0.000000] DMA32 zone: 8819 pages used for memmap [ 0.000000] DMA32 zone: 564392 pages, LIFO batch:31 [ 0.000000] Normal zone: 56280 pages used for memmap [ 0.000000] Normal zone: 3601920 pages, LIFO batch:31 [ 0.000000] tboot: non-0 tboot_addr but it is not of type E820_RESERVED [ 0.000000] Reserving Intel graphics stolen memory at 0x8ba00000-0x8f9fffff [ 0.000000] ACPI: PM-Timer IO Port: 0x408 [ 0.000000] ACPI: Local APIC address 0xfee00000 [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x02] high edge l...

...batch:0 [ 0.000000] DMA32 zone: 7803 pages used for memmap [ 0.000000] DMA32 zone: 499362 pages, LIFO batch:31 [ 0.000000] Normal zone: 57304 pages used for memmap [ 0.000000] Normal zone: 3667456 pages, LIFO batch:31 [ 0.000000] tboot: non-0 tboot_addr but it is not of type E820_RESERVED [ 0.000000] ACPI: PM-Timer IO Port: 0x408 [ 0.000000] ACPI: Local APIC address 0xfee00000 [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x02] high edge lint[0x1]) [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x03] high edge lint[0x1]) [...

Hi all, this patch series makes the necessary changes to make sure that the current ARM hypercall ABI can be used as-is on 64 bit ARM platforms: - it defines xen_ulong_t as uint64_t on ARM; - it introduces a new macro to handle guest pointers, called XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to have size 8 bytes on aarch64); - it replaces all the occurrences of

Hi Ingo, Here''s the chunk of patches to add Xen Dom0 support (it''s probably worth creating a new xen/dom0 topic branch for it). A dom0 Xen domain is basically the same as a normal domU domain, but it has extra privileges to directly access hardware. There are two issues to deal with: - translating to and from the domain''s pseudo-physical addresses and real machine