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e3200000
2013 Nov 21
0
[LLVMdev] ARM integrated assembler generates incorrect nop opcode when switching from arm to thumb mode
...r0,
r0
2: 00 f0 20 e3 blx
#4195904
6: 00 00 movs r0,
r0
8: 00 44 add r0,
r0
This shows that we have actually emitted an arm nop (e320f000) instead of a
thumb nop. Unfortunately, this encodes to a thumb branch which causes bad
things to happen when compiling assembly code with align directives.
The ARMAsmBackend class is responsible for emitting these nops. It keeps
track of whether it should emit arm or thumb nop. The first problem...