Displaying 11 results from an estimated 11 matches for "dwiberg".
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2014 Jul 30
2
[LLVMdev] [PowerPC] ABI questions
Hello Ulrich,
Thank you for a good explanation of the different variants.
2014-07-30 21:29 GMT+02:00 Ulrich Weigand <Ulrich.Weigand at de.ibm.com>:
> Hi David,
>
>> I'm trying to understand which ABIs are supported in the PowerPC
>> backend and I'm getting a bit confused. Here's what I've gathered so
>> far alongside with some questions.
>
>
2014 Jul 31
2
[LLVMdev] [PowerPC] ABI questions
----- Original Message -----
> From: "Ulrich Weigand" <Ulrich.Weigand at de.ibm.com>
> To: "David Wiberg" <dwiberg at gmail.com>
> Cc: llvmdev at cs.uiuc.edu
> Sent: Wednesday, July 30, 2014 2:29:22 PM
> Subject: Re: [LLVMdev] [PowerPC] ABI questions
>
> Hi David,
>
> > I'm trying to understand which ABIs are supported in the PowerPC
> > backend and I'm getting a bit c...
2014 Jul 09
2
[LLVMdev] How to resolve decoding conflict?
Hi all,
Short version
I get decoding conflicts during generation of disassembler tables for
my modified PowerPC backend:
001100..........................
................................
ADDIC 001100__________________________
E_LBZ 001100__________________________
Which methods can be used to resolve this kind of error?
Long version:
I'm trying to implement support for the PowerPC
2013 Jul 22
0
[LLVMdev] Inst field in MSP430InstrFormats.td
The Inst field is used to specify instruction encodings, which are then used to generate assemblers and disassemblers. I'm not sure offhand, but it's possible that the MSP430 backend doesn't make use of an auto-generated assembler.
--Owen
On Jul 21, 2013, at 4:19 PM, David Wiberg <dwiberg at gmail.com> wrote:
> Hello,
>
> Within the file "MSP430InstrFormats.td" there is a class called
> "MSP430Inst" which has "Instruction" as superclass. Within this class
> there is a field called "Inst" (field bits<16> Inst;) which g...
2016 May 08
2
typedef not present in the python AST
Hello,
I'm trying to use the python libclang bindings to write a C++
style-checker, and I'd like to detect all the typedefs to recommend
switching to using. I'm using libclang 3.8, with the python bindings
provided with it.
When I parse a file with
index = clang.cindex.Index.create()
tu = index.parse(f, ['-x', 'c++', '-std=c++11', '-fsyntax-only',
2013 Jul 21
3
[LLVMdev] Inst field in MSP430InstrFormats.td
Hello,
Within the file "MSP430InstrFormats.td" there is a class called
"MSP430Inst" which has "Instruction" as superclass. Within this class
there is a field called "Inst" (field bits<16> Inst;) which gets
assigned in classes which specifies a specific instruction format,
e.g. IForm contains:
let Inst{12-15} = opcode;
let Inst{7} = ad.Value;
let
2015 Jul 31
1
[LLVMdev] Wrong encoding/decoding for POPC instruction of Sparc
Hi James,
Not sure if you've already found the problem but I've been looking at this
issue a bit as a way to learn. What I've seen is that the wrong operand
names are used for the instruction which causes the decoder emitter to fail
to recognize the operands.
The attached patch changes the names of the operands and adds a test for
the disassembly of the instruction. I haven't
2015 Jul 31
2
[LLVMdev] Wrong encoding/decoding for POPC instruction of Sparc
I'll look into it, thanks for the report.
On Thu, Jul 30, 2015 at 11:01 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
> Any ideas on this bug?
>
> Thanks.
>
>
> On Wed, Jul 29, 2015 at 12:17 AM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
>> Hello,
>>
>> There is an issue in the latest Sparc code: while we can encode POPC,
>> decode
2018 Aug 14
2
Error: ‘class llvm::PassManager<llvm::Module>’ has no member named ‘add’
Hi Philip,
I also tried that including file:
#include "llvm/IR/LegacyPassManager.h"
but error remain same. Please help.
On Tue, Aug 14, 2018, 2:58 AM Philip Pfaffe <philip.pfaffe at gmail.com> wrote:
> Hi Ratnesh,
>
> the PassManager used in that example has moved into the legacy namespace:
> http://llvm.org/doxygen/classllvm_1_1legacy_1_1PassManager.html
>
>
2014 Jul 30
4
[LLVMdev] [PowerPC] ABI questions
Hi all,
I'm trying to understand which ABIs are supported in the PowerPC
backend and I'm getting a bit confused. Here's what I've gathered so
far alongside with some questions.
- In PPCSubtarget.h there's DarwinABI, SVR4ABI and ELFv2ABI.
- The CodeGenerator documentation claims that the AIX PowerPC ABI is
followed (with some deviations). Is this refering to the DarwinABI?
-
2014 Aug 11
2
[LLVMdev] Small Data Adressing support
Hi all,
I'm trying figure out how to implement support for Small Data
Addressing (SDA) for an out-of-tree PowerPC target. The short
description of SDA is that small globals are gathered in the same
memory area and addressed using a base register + an offset. From what
I've seen the Hexagon target already support this but as that target
doesn't seem to support writing object files it