Displaying 2 results from an estimated 2 matches for "dsub1".
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sub1
2012 Mar 31
1
[LLVMdev] CompositeIndices
Does anyone know exactly what ComposerIndices in Target.td is all about?
I see just one place where it's used in X86 but it's not clear from the
comments in Target.td and it's one usage, exactly what this feature is
about.
Tia.
Reed
2010 Nov 18
1
[LLVMdev] subregs in trivial coalescing
....
116L %reg16405:sub0<def> = COPY %reg16402:sub1, %reg16405<imp-def>;
QPR:%reg16405,16402
124L %reg16413:sub0<def> = COPY %reg16405:sub0<kill>; QPR:%reg16413,16405
.... stuff ....
468L %reg16460:sub3<def> = COPY %reg16402:sub0<kill>; QPR:%reg16460,16402
dsub0/dsub1 are 64-bit subregs and sub0/1/2/3 are 32 bit subregs. DEF64 is
just representative of a 64 bit ALU operation.
The code is correct at this point.
Q1 (a 128-bit physical register) is assigned to %reg16402 which is ok but
then RALinScan::attemptTrivialCoalescing thinks it can coalesce r16405 with
r1...