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...sees fit. If no such functionality > is needed, the default behavior is to write to stdout/stderr as it does now. > Perhaps I'm just getting the wrong impression from the current LLVM code base. Take this snippet from LinkModules.cpp: if (!SrcM->getDataLayout().empty() && !DstM->getDataLayout().empty() && SrcM->getDataLayout() != DstM->getDataLayout()) errs() << "WARNING: Linking two modules of different data layouts!\n"; if (!SrcM->getTargetTriple().empty() && DstM->getTargetTriple() != SrcM->getTargetTr...

On Thu, May 31, 2012 at 8:06 PM, Chris Lattner <clattner at apple.com> wrote: > > On May 31, 2012, at 2:39 PM, Justin Holewinski wrote: > > > The attached patch add the ability to programmatically re-direct > outs()/errs() to an arbitrary raw_ostream instance, maintaining the > raw_ostream instances in a stack structure so clients can push/pop streams > at will. The

...stream for message triaging. Yes, this is broken. The fix should be in the linker though, not in errs(). > Perhaps I'm just getting the wrong impression from the current LLVM code base. Take this snippet from LinkModules.cpp: > > if (!SrcM->getDataLayout().empty() && !DstM->getDataLayout().empty() && > SrcM->getDataLayout() != DstM->getDataLayout()) > errs() << "WARNING: Linking two modules of different data layouts!\n"; > if (!SrcM->getTargetTriple().empty() && > DstM->getTargetTriple() !=...

.... However, only NVPTX makes use of tblgen which removes some burder from the backend developer. I also think that a tblgen-based backend like NVPTX is easier to maintain in the long term. What do you think? 2) NAC uses the following statement form (for any given statement): dst1, dst2, ..., dstm <= op src1, src2, ..., srcn; which expresses an operation op with n source operands and m destination operands. Do you think that tblgen supports such form or should I sanitize it? 3) The NAC memory model uses separate address spaces per array. A general-use stack/heap might also be supp...

...uestions, I'm no expert, but you might want to take a look at the available tutorials (http://llvm.org/docs/WritingAnLLVMBackend.html and http://jonathan2251.github.com/lbd/). -- Ahmed Bougacha > 2) NAC uses the following statement form (for any given statement): > > dst1, dst2, ..., dstm <= op src1, src2, ..., srcn; > > which expresses an operation op with n source operands and m destination > operands. Do you think that tblgen supports such form or should I sanitize > it? > > 3) The NAC memory model uses separate address spaces per array. A > general-use st...

Hi Linhai, > Hi, > > I have some applications, which have been compiled into llvm IR and then > linked into executable programs. I have some static information got from > analysing llvm IR, and some dynamic information, like which binary branch is > taken, from hardware sampler. I am wondering whether there are some ways to map > binary code with LLVM IR. The only way I

Hi, I have some applications, which have been compiled into llvm IR and then linked into executable programs. I have some static information got from analysing llvm IR, and some dynamic information, like which binary branch is taken, from hardware sampler. I am wondering whether there are some ways to map binary code with LLVM IR. The only way I know is to use debug info, since both llvm

...want to take > a look at the available tutorials > (http://llvm.org/docs/WritingAnLLVMBackend.html and > http://jonathan2251.github.com/lbd/). > > -- Ahmed Bougacha > > > 2) NAC uses the following statement form (for any given statement): > > > > dst1, dst2, ..., dstm <= op src1, src2, ..., srcn; > > > > which expresses an operation op with n source operands and m destination > > operands. Do you think that tblgen supports such form or should I > sanitize > > it? > > > > 3) The NAC memory model uses separate address spac...