search for: dsls

Displaying 20 results from an estimated 60 matches for "dsls".

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2016 Feb 27
0
[JOB] Job opportunity for compiling DSLs and automatic differentiation in finance
Greetings, My team at Numerix LLC (www.numerix.com) is spinning up what I expect to be a long term effort using LLVM to generate fast code for calculations on financial instruments. One area we will apply apply LLVM is compiling instead of interpreting our domain specific language (DSL) that our customers use for modeling complex financial instruments to dramatically improve performance. A less
2020 Feb 13
2
[RFC] Extension to TableGen's AssemblerPredicates to support combining features with ORs
Hi, I'd like to propose extending the supported syntax for AssemblerPredicates to allow sets of SubtargetFeatures to be listed, but where only one in the list has to be enabled for the predicate to be true. The condition string which forms a AssemblerPredicate already allows multiple features to be defined, separated by commas, and this means all of these features must be present. For
2003 Dec 15
4
Problems with ICQ etc. on nano-setup
I administer a nano-setup on a dorm-network with a couple of hundred active users. The setup uses 2 x 2 2Mb/s DSLs, meaning two DSLs from each of two different ISPs. It works fine except for some minor glitches: https-sites often kicks users. This was solved by tying outbound https to a single DSL. Not the best solution but it works so far that users dont kicked from the sites anymore. Now they can put cre...
2013 Oct 31
4
[LLVMdev] LLVM BoF at SC13
...you will be at SC13, have an interesting project based on or within LLVM, and would be willing to come to the BoF and spend 10 minutes or so giving an overview of it, please email me. I am trying to get a collection of people together to talk about vectorization and parallelization in particular. DSLs targeting HPC would also be interesting. Of course you can also attend without presenting, and please let people interested in LLVM know about this event! Thanks! Michael McCool (Intel) -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/piperm...
2006 Jul 15
2
Database Config as DSL
...g to this week''s Ruby on Rails Podcast the issue of YAML came up, and it got me thinking. Yes, YAML is very simple and cleanly defines both the database configuration and fixtures, but couldn''t the same thing be accomplished in Ruby? Jamis and others have encouraged the use of DSLs to simplify and clarify code. Since Django (whose author was on the podcast) uses Python to describe its database configuration, why not use Ruby for Rails''? Here''s a sample of a DB config in the DSL: ---------------------------------- common { adapter "mysql" us...
2013 Jun 02
1
[LLVMdev] Language Construction and IDE Kit
Hi, Is to possible to have a language construction and IDE integration kit for LLVM so that LLVM / Clang can be used for Meta Programming and defining new languages and DSLs. The definition of grammar, parsing, debugging, lint checking and IDE integration should be seamless and easy to use for a novice. Suminda -- Suminda Sirinath Salpitikorala Dharmasena, B.Sc. Comp. & I.S. (Hon.) Lond., P.G.Dip. Ind. Maths. J'Pura, MIEEE, MACM, CEO Sakrīō! ▣ *Address*: 6G •...
2003 Apr 04
0
routed vs. gated
Can anybody help me figure out whether I should be using gated rather than routed? I have two DSLs connected to my firewall/router (RH 7.3), running routed, with load balancing. I''m trying to figure out whether gated-3.6 (the last open-source version) is better for my system, but I can''t find enough out about it to decide whether to move to it (or something even better). I&...
2013 Jun 10
0
[LLVMdev] NEON vector instructions and the fast math IR flags
...d not to preserve denormals. Secondly, I think it would be helpful to at least try to map out which "optimizations" are going to be viewed by a per-instruction IR flag just in order to get a clearer idea if the global stuff is the right model. (Amongst other things, I'm interested in DSLs where the likelihood of knowing something about the "ideal requirements" for operations that will be transformed into LLVM IR is higher than for manually written C/Fortran.) Cheers, Dave -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be...
2013 Jun 10
1
[LLVMdev] NEON vector instructions and the fast math IR flags
...serve denormals. True. > Secondly, I think it would be helpful to at least try to map out which "optimizations" are going to be viewed by a per-instruction IR flag just in order to get a clearer idea if the global stuff is the right model. (Amongst other things, I'm interested in DSLs where the likelihood of knowing something about the "ideal requirements" for operations that will be transformed into LLVM IR is higher than for manually written C/Fortran.) Sorry, I did not get this sentence. Would you mind rephrasing it? At the moment I am mainly concerned of the code...
2013 Jan 25
0
[LLVMdev] LoopVectorizer in OpenCL C work group autovectorization
Pekka, I am in favor of adding metadata to control different aspects of vectorization, mainly for supporting user-level pargmas [1] but also for DSLs. Before we start adding metadata to the IR we need to define the semantics of the tags. "Parallel_for" is too general. We also want to control vectorization factor, unroll factor, cost model, etc. Doug Gregor suggested to add the metadata to the branch instruction of the latch block in...
2013 Nov 14
0
[LLVMdev] [PATCH] Add a Scalarize pass
...uld then not > test TargetTransformInfo at all, at least in the initial version, > and the scalarisation would still logically be done by codegen. > Would that be OK? I actually prefer that the Scalarizer would not touch TTI at all because I view scalarization a canonicalization phase for DSLs, much like SROA breaks structs. I am okay with SystemZ adding it to its own compilation flow. Thanks, Nadav
2008 Mar 17
9
Roxygen
Is this the appropriate place for GSoC conversations? If I understand the proposal correctly, there should be a lexer (written in R) that exposes an API; that API would be used by segregated mini-parsers (Roclets) which do the dirty work of Roxygen -> {html, LaTeX, DocBook, ...} translation. The lexer should ship with a proof-of-concept Roclet. Have I missed anything?
2013 Nov 14
2
[LLVMdev] [PATCH] Add a Scalarize pass
Richard Sandiford <rsandifo at linux.vnet.ibm.com> writes: > Are you worried that adding it to PMB will increase compile time? > The pass exits very early for any target that doesn't opt-in to doing > scalarisation at the IR level, without even looking at the function. As an alternative, adding Scalarizer and InstCombine passes to SystemZPassConfig::addIRPasses() would probably
2011 Oct 05
2
[LLVMdev] LLVM IR is a compiler IR
...a other routes? Can LLVM do (one day) what you wanted it to do today? A higher level representation for light-weight JITs, a rich type-system for complex linkage of higher languages, special semantics for special purposes, etc. Today, LLVM IR is NOT portable, so why worry about the portability of DSLs around it? OpenCL rep. can be different (in syntax, and semantics) from C++ rep., but it should be similar to RenderScript rep. If you want to link CL and C++ reps, lower them to LLVM IR, or use the common subset. -- cheers, --renato http://systemcall.org/
2000 Nov 16
6
Backup Route
Hi there. I''ve two Internet connections at the same box, one connection is made through ADSL, and another is made with a Radio-Link (WaveLAN IE822). I wan''t to do a backup connection with the ADSL link. With what tools I can do this? ipchains, iptables, a third party tool? -- ____________________________________________________________ PIII 500MHz - 98MB RAM -
2019 Sep 18
3
COAT: an EDSL making just-in-time code generation easier
Hi all, I open sourced a small project of mine recently. It is an EDSL for C++ which makes just-in-time compilation much easier to write and maintain. One of its backends is LLVM's OrcJIT (LLVM 7, still). https://github.com/tetzank/coat Here is a blog post of mine introducing the concept: https://tetzank.github.io/posts/coat-edsl-for-codegen/ You can see it as an abstraction layer on top
2013 Jun 07
2
[LLVMdev] NEON vector instructions and the fast math IR flags
On 06/07/2013 06:49 AM, Arnold Schwaighofer wrote: > > On Jun 7, 2013, at 3:14 AM, Renato Golin <renato.golin at linaro.org> wrote: > >> On 7 June 2013 08:48, Tobias Grosser <tobias at grosser.es> wrote: >> When to set which subtarget feature is a policy decision, where I honestly don't have any opinion on for clang. The best is probably to mirror the gcc
2013 Nov 15
2
[LLVMdev] [PATCH] Add a Scalarize pass
...TargetTransformInfo at all, at least in the initial version, >> and the scalarisation would still logically be done by codegen. >> Would that be OK? > > I actually prefer that the Scalarizer would not touch TTI at all because > I view scalarization a canonicalization phase for DSLs, much like SROA > breaks structs. That's what Pekka is thinking of using it for, but it wasn't the reason I wrote it. The original motivation was llvmpipe, which is a rasteriser rather than a DSL compiler. The motivation wasn't to canonicalise, it was to do the same thing that cod...
2005 May 22
2
Help PLEASE...Multi-Routing for ADSL on Linux: Request for pointers..
...iders. He is not willing to give a live ip, even on extra charge. Now, I want to connect three DSL''s to my Internet gateway (ipcop machine...again as I already have three LAN cards..no more slots left), using one ethernet card connected to a four port switch where I can terminate both the DSLs & cable internet connection. And to give two static IPs (one public, one private) and one dynamic IP to my ethernet card on the WAN side, using something like nexthop given in the LARTC howto Is this type os scenario: 1. Possible? 2. Easily maintainable? Especially on top an existing firewall...
2013 Feb 07
5
[LLVMdev] [NVPTX] We need an LLVM CUDA math library, after all
...these things on its specific preference. Derived compilers may certainly think different, and it's their own business to change anything they want and never contribute back. We should not forget there are a lot of derived projects that use LLVM directly, like KernelGen or many of those embedded DSLs recently started flourishing. Their completeness and future relies on LLVM. For these reasons, I would strongly prefer LLVM/NVPTX should supply a reference GPU math implementation and invite you and everyone else to form a joint roadmap to deliver it. Before we started, IANAL, but something tells...