search for: ds2153

...tel 0.50) says: #define MASTERVAL 0x41 /* Enable E1 master clock on Rev. B board */ Does that mean that there is a torisa revB? If so, are the schematics downloadable from somewhere? (www.zapatatelephony.org only has Rev. A ones) Does the Rev. A support E1? (just changing the DS2151 for DS2153, the DS crystal and closing the E1 jumpers, or something else is needed?) Thanks, HoraPe --- Horacio J. Pe?a horape@compendium.com.ar horape@uninet.edu

...derstand the torisa design and i'm mistified by the upper part of the third page (generation of ALE and DWR from MEMWR and CS2..5) Can somebody explain me how the magic there works? Why can't just do ALE = ~(CS3 | CS5) and DWR = MEMWR ? (DS app note 326/452, "DS2141A, DS2143, DS2151, DS2153 Interfacing to a Nonmultiplexed Bus", at http://www.maxim-ic.com/appnotes.cfm/appnote_number/452 does just that) Thanks, HoraPe --- Horacio J. Pe?a horape@compendium.com.ar horape@uninet.edu