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torisa: trying to understand the design
2003 Apr 21
0
torisa: trying to understand the design
...la! I'm trying to understand the torisa design and i'm mistified by the upper part of the third page (generation of ALE and DWR from MEMWR and CS2..5) Can somebody explain me how the magic there works? Why can't just do ALE = ~(CS3 | CS5) and DWR = MEMWR ? (DS app note 326/452, "DS2141A, DS2143, DS2151, DS2153 Interfacing to a Nonmultiplexed Bus", at http://www.maxim-ic.com/appnotes.cfm/appnote_number/452 does just that) Thanks, HoraPe --- Horacio J. Pe?a horape@compendium.com.ar horape@uninet.edu